3D Interconnect Multi-Die Inductors with TSV Cores
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Solution Overview
Problem
The challenge in semiconductor devices is to miniaturize inductors while maintaining high inductance and efficiency, as traditional inductors are bulky and consume significant power, and spiral inductors occupy large surface areas, making them cost- and size-prohibitive.
Innovation Solution
The implementation of multi-die semiconductor devices with through-substrate via cores and substantially helical conductors that induce magnetic fields to couple signals and power efficiently, using magnetic materials to enhance inductance and reduce area occupancy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional discrete inductors are used, then high inductance is achieved, but the device occupies large area and consumes significant power
Solution Approach 1:
The patent transitions from planar spiral inductors to three-dimensional stacked inductors with vertical coupling. Multiple inductor windings are stacked in the vertical dimension and coupled through magnetic cores that extend between dies, enabling high inductance in a compact footprint by utilizing the third dimension for magnetic flux path.
Solution Approach 2:
The invention employs composite magnetic core structures combining ferrite materials with different permeabilities. The magnetic cores include ferrite layers with varying permeability values (e.g., 2000, 5000, 10000) arranged in specific configurations to optimize magnetic coupling and inductance while minimizing area occupancy.
2Manufacturing precision
If spiral inductors are fabricated in a single level, then inductance is achieved, but the surface area occupied is large making fabrication costly
Solution Approach 1:
The inductor structure is segmented into multiple discrete windings stacked in different layers. Each winding can be fabricated separately using standard semiconductor processes, then assembled into a stacked configuration. This segmentation enables modular fabrication and reduces the complexity of creating high-inductance elements in a single plane.
Solution Approach 2:
Multiple inductor windings are nested in a vertical stack configuration, with each winding contained within its own layer. The magnetic cores are nested between the windings, creating a compact nested structure that achieves high inductance without requiring large planar space, thereby reducing fabrication costs.
3Manufacturing precision
If active inductors using operational amplifiers are used, then high inductance and high Q factor are achieved, but power consumption increases significantly
Solution Approach 1:
The patent replaces active electronic circuits (operational amplifiers) with passive magnetic structures. The magnetic cores and coupled windings provide the inductive function through physical magnetic coupling rather than active electronic amplification, eliminating the power consumption associated with operational amplifiers while maintaining high inductance and Q factor.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high inductance and efficient coupling in a small area, reducing power consumption and fabrication costs, enabling the creation of compact, efficient inductive elements in semiconductor devices.
Implementation Method 1
a first substantially helical conductor disposed around the TSV. The first substantially helical conductor is configured to induce a magnetic field in the TSV in response to a first changing current in the first substantially helical conductor
Implementation Method 2
the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the portion of the TSV
Data Source
AI summary
A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV) extending at least substantially through the first die, the TSV having a portion extending past the first surface. The first die further includes a first substantially helical conductor disposed around the TSV. The second die of the device includes a second surface, an opening in the second surface in which the portion of the TSV is disposed, and a second substantially helical conductor disposed around the opening.