3D Semiconductor TSV Delay Measurement via Replica Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional 3D semiconductor apparatuses using through-silicon vias (TSVs) face inaccuracies in measuring signal transfer time due to additional delays caused by connection pads and PVT variations, leading to performance disparities among chips.
Innovation Solution
The semiconductor apparatus incorporates a master chip with a replica circuit unit and a signal path selection unit, along with through-chip vias, to accurately measure delay by selectively routing input signals through either the signal transfer unit or the replica circuit unit, allowing for comparison of signal delays across multiple TSVs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional total time delay measurement method is used in 3D semiconductor apparatus, then the measurement can be performed simply by dividing total delay by the number of TSVs, but the measurement precision deteriorates due to additional delays caused by connection pads and PVT variations
Solution Approach 1:
The measurement system is segmented into multiple independent measurement paths: a first measurement path through the slave chip TSVs and a second measurement path through the master chip TSVs. This segmentation allows separate measurement of delays in each path, enabling subtraction of connection pad delays and PVT variations to obtain accurate TSV delay values.
Solution Approach 2:
The master chip serves as an intermediary measurement platform that provides a reference path for delay measurement. By introducing the master chip's TSV path as an intermediary reference, the system can differentiate between TSV-specific delays and other systematic delays from connection pads and PVT variations.
2Adaptability or versatility
If TSV diameter and length vary across chips, then the driving ability and signal transfer time differ, but this causes performance disparities among chips
Solution Approach 1:
The system implements feedback by measuring actual TSV delay values for each chip and using these measurements to compensate for performance variations. The measured delay information feeds back into the system to adjust timing parameters and ensure consistent performance across chips with different TSV dimensions.
Solution Approach 2:
The system changes operational parameters based on measured TSV characteristics. By adjusting timing parameters and signal transfer settings according to the measured delay values, the system adapts to variations in TSV diameter and length, maintaining consistent performance across different chips.
Data Source
AI summary
A semiconductor apparatus includes: a slave chip including a signal transfer unit configured to determine whether or not to transfer an input signal in response to a chip select signal; a master chip including a replica circuit unit having the same configuration as the signal transfer unit and a signal output unit configured to receive an output signal of the signal transfer unit and an output signal of the replica circuit unit and generate an output signal in response to the control signal; a first through-chip via vertically formed through the slave chip, and having one end connected to the master chip to receive the input signal and the other end connected to the signal transfer unit; and a second through-chip via vertically formed through the slave chip, and having one end connected to the signal transfer unit and the other end connected to the signal output unit.