TSV Detecting Circuit for 3D IC Connectivity Verification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Three-dimensional (3D) integrated circuit chips with through-silicon vias (TSVs) are prone to failures during manufacturing and bonding, affecting their performance, and existing methods lack effective connectivity detection for large-scale TSVs.
Innovation Solution
A through-silicon via (TSV) detecting circuit and method that includes an input circuit with a switching mechanism to transmit a power signal and a comparison circuit to assess signal integrity, allowing for the detection of TSV connectivity by comparing signals across TSVs and a reference signal, suitable for large-scale integrated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If TSVs are used to connect multiple chip layers in 3D integrated circuits, then the functionality and connectivity of the circuit are improved, but the susceptibility to manufacturing and bonding failures increases
Solution Approach 1:
The patent implements preliminary detection of TSV connectivity before final assembly and operation. The detection circuit tests electrical continuity through TSVs during the manufacturing process, identifying potential failures before they affect the final product reliability. This preliminary action allows for early detection and replacement of defective TSV structures.
Solution Approach 2:
The patent employs feedback mechanisms where detection results from TSV testing are used to control subsequent manufacturing steps. When detection circuits identify connectivity issues, the system provides feedback to adjust manufacturing parameters or trigger rework processes, thereby improving overall reliability through continuous monitoring and correction.
2Reliability
If detection circuits are added to detect TSV connectivity, then the reliability of detection is improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent designs detection circuits that serve multiple functions: they detect TSV connectivity, test interlayer connections, and verify electrical continuity across different chip layers. This multi-functionality reduces the need for separate dedicated test structures, thereby limiting the increase in device complexity while maintaining high detection reliability.
Solution Approach 2:
The detection circuit is designed to be self-contained and self-testing, where the same circuit structures that perform normal circuit functions also serve as test structures. This self-service approach eliminates the need for additional external testing equipment or complex external test fixtures, thereby limiting complexity increase while ensuring reliable detection.
3Ease of manufacture
If conventional detection methods are used for TSV connectivity, then the manufacturing process remains simple, but the detection capability is insufficient for large-scale TSVs
Solution Approach 1:
The patent divides the detection process into segmented stages corresponding to different manufacturing steps. Instead of attempting to detect all TSV connectivity issues in a single complex test, the detection is segmented into multiple simpler tests performed at different stages, making the overall process easier to manufacture while maintaining comprehensive detection capability for large-scale TSV arrays.
Data Source
AI summary
A through-silicon via (TSV) detecting circuit, a detecting method, and an integrated circuit having the same are disclosed. The TSV detecting circuit includes: an input circuit including a first switching circuit, the first switching circuit comprising a control terminal coupled to a first detection control signal, a first terminal coupled to a first power signal, and a second terminal coupled to a first terminal of a TSV, wherein the first switching circuit is configured to be turned on in response to the first detection control signal to transmit a first power signal to the first terminal of the TSV; and a comparison circuit comprising a first input coupled to a second terminal of the TSV, and a second input coupled to a reference signal, wherein the comparison circuit is configured to compare a signal of the second terminal of the TSV and the reference signal.