Metal-Contamination-Free TSV Structure via Diffusion Barrier
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional through-substrate via (TSV) structures in semiconductor chips are prone to metal contamination due to residual copper material diffusing through the silicon oxide dielectric liner, leading to electrical shorts and other detrimental effects.
Innovation Solution
A metal-contamination-free TSV structure is achieved by depositing a diffusion barrier liner on the sidewalls of the TSV trench, followed by a dielectric liner and a metallic conductive via structure, with horizontal portions of the diffusion barrier liner removed to prevent residual metallic material from entering the semiconductor substrate during backside planarization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon oxide dielectric liner is used to laterally electrically isolate the copper via structure from the substrate, then electrical isolation is achieved, but metallic materials can still diffuse through the liner causing contamination
Solution Approach 1:
The patent uses a composite liner structure consisting of a silicon oxide dielectric liner combined with a diffusion barrier liner (such as tantalum nitride or tungsten nitride). This composite structure provides both electrical isolation properties from the silicon oxide and diffusion barrier properties from the metal nitride layer, preventing copper atoms from penetrating into the semiconductor substrate while maintaining electrical isolation between the via structure and substrate.
Solution Approach 2:
The diffusion barrier liner acts as an intermediary layer between the copper via structure and the semiconductor substrate. This intermediate layer specifically blocks the diffusion of metallic materials (copper atoms) while allowing the silicon oxide dielectric liner to perform its electrical isolation function, thus mediating between the conductive via structure and the sensitive semiconductor material.
2Ease of manufacture
If residual copper material is generated during chemical mechanical polishing, then via structure formation is completed, but copper can smear onto the dielectric liner and diffuse into the substrate
Solution Approach 1:
The diffusion barrier liner is deposited on the sidewalls of the via structure before the chemical mechanical polishing process. This preliminary protective layer prevents copper material generated during polishing from smearing onto the dielectric liner and diffusing into the substrate. The barrier liner is specifically designed to resist copper diffusion even when exposed to residual copper particles and smearing during the polishing process.
3Reliability
If the diffusion barrier liner completely contacts the sidewall, then protection is maximized, but manufacturing complexity increases due to additional deposition and etching steps
Solution Approach 1:
The diffusion barrier liner is applied selectively to specific regions where copper diffusion is most likely to occur, such as the sidewalls of the via structure and potentially the bottom region near the substrate interface. This localized application provides maximum protection against contamination while minimizing the overall amount of additional material deposition and reducing the complexity of the manufacturing process compared to coating entire surfaces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The diffusion barrier liner effectively blocks metallic contamination, protecting the semiconductor material and preventing electrical shorts, thereby ensuring the reliability of semiconductor devices.
Implementation Method 1
a diffusion barrier liner that contacts an entirety of a contiguous sidewall around a hole within the semiconductor substrate
Implementation Method 2
Horizontal portions of the diffusion barrier liner can be removed by an anisotropic etch prior to deposition of a conductive material for the metallic conductive via structure
Implementation Method 3
a diffusion barrier liner is conformally deposited on the sidewalls of the TSV trench
Implementation Method 4
A dielectric liner is formed by depositing a dielectric material on vertical portions of the diffusion barrier liner
Data Source
AI summary
A through-substrate via (TSV) structure that is immune to metal contamination due to a backside planarization process is provided. After forming a through-substrate via (TSV) trench, a diffusion barrier liner is conformally deposited on the sidewalls of the TSV trench. A dielectric liner is formed by depositing a dielectric material on vertical portions of the diffusion barrier liner. A metallic conductive via structure is formed by subsequently filling the TSV trench. Horizontal portions of the diffusion barrier liner are removed. The diffusion barrier liner protects the semiconductor material of the substrate during the backside planarization by blocking residual metallic material originating from the metallic conductive via structure from entering into the semiconductor material of the substrate, thereby protecting the semiconductor devices within the substrate from metallic contamination.