Through-Silicon Via Layout With Diffusion Break Isolation

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Solution Overview

Problem

Integrated circuits with through silicon vias are sensitive to the effects of these vias, leading to performance and reliability issues in devices with reduced sizes due to semiconductor process advancements.

Innovation Solution

Incorporating a keep out zone (KOZ) around the through silicon via where active patterns and gate electrodes are omitted, and using diffusion breaks and dam structures to maintain device integrity and reliability, with no additional manufacturing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If through silicon vias are used for chip interconnection, then device integration is improved, but device sensitivity to via effects increases leading to performance degradation

Engineering Contradiction:
Improvedevice integrationVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The active pattern is divided into multiple segments by inserting diffusion breaks between adjacent active patterns. This segmentation prevents harmful effects from through silicon vias from affecting the entire active pattern, isolating the impact to only those patterns directly intersected by vias while protecting neighboring patterns through the diffused region barriers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are treated differently: regions with through silicon vias receive diffusion breaks for protection, while regions without vias maintain continuous active patterns for optimal device performance. This localized approach applies protection only where needed, maintaining high integration density while ensuring reliability in vulnerable areas.

Inventive Principle:
Principle #3Local quality

2Area of moving object

If device size is reduced for high integration, then integration density is improved, but sensitivity to through silicon via effects increases

Engineering Contradiction:
Improvedevice sizeVSAvoidsensitivity to via effects
Core Design Contradiction:
Area of moving objectVSObject-affected harmful factors

Solution Approach 1:

By segmenting active patterns with diffusion breaks, the patent creates isolated regions that prevent the propagation of harmful via effects across the entire active pattern. This allows smaller device dimensions to be used without proportionally increasing sensitivity, as the diffusion breaks act as protective barriers that contain via-induced damage locally.

Inventive Principle:
Principle #1Segmentation

3Reliability

If diffusion breaks are added to protect active patterns, then device reliability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The diffusion break formation is merged with the existing active pattern formation process. Both structures are created using the same doping and patterning steps, eliminating the need for separate manufacturing processes. This integration maintains high reliability through proper diffusion break placement while avoiding additional manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

4Productivity

If through silicon vias penetrate active patterns, then connection efficiency is improved, but device performance and reliability deteriorate

Engineering Contradiction:
Improveconnection efficiencyVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments active patterns with diffusion breaks positioned between adjacent patterns, allowing through silicon vias to penetrate the substrate and connect chips efficiently while the diffusion breaks prevent harmful effects from spreading to neighboring patterns. This maintains connection efficiency while protecting device performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The diffusion break acts as an intermediary barrier between through silicon vias and active patterns. It allows the via structure to exist for connection purposes while mediating the harmful effects, preventing them from directly affecting the active patterns and thus preserving device performance and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250343109A1Integrated circuit including through silicon vias
Publication Date: 2025.11.06 SAMSUNG ELECTRONICS CO LTD
  • US20250343109A1 patent drawing
  • US20250343109A1 patent drawing
  • US20250343109A1 patent drawing

AI summary

Integrated circuits are provided. In one aspect, an integrated circuit includes: a plurality of first active patterns positioned in a first region and extending in a first horizontal direction on a substrate; a through silicon via positioned in the first region and vertically extending through the substrate and at least one of the plurality of first active patterns; and a plurality of first diffusion breaks position in the first region, the plurality of first diffusion breaks extending in a second horizontal direction and dividing the plurality of first active patterns.