TSV Multi-Layer Liner Structure for Diffusion Control and Low Capacitance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The formation of Through-Silicon Vias (TSVs) faces challenges in preventing diffusion and minimizing parasitic capacitance, which affects the electrical performance and reliability of semiconductor devices.
Innovation Solution
A multi-layer liner structure is implemented for TSVs, comprising a dense outer liner to act as a diffusion barrier and a thinner inner liner with a lower k-value, which are formed using different materials and deposition methods to optimize coverage and reduce parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single thick liner is used to prevent diffusion, then diffusion prevention is improved, but parasitic capacitance increases
Solution Approach 1:
The liner structure is segmented into multiple layers with different materials and thicknesses. The first liner layer (closer to TSV opening) has greater thickness for diffusion prevention, while the second liner layer (farther from TSV opening) has lesser thickness to reduce parasitic capacitance. This segmentation allows each layer to optimize its function independently.
Solution Approach 2:
Different regions of the liner structure have different material compositions and thicknesses tailored to local requirements. The region closer to the TSV opening uses thicker liner material for maximum diffusion barrier performance, while regions farther away use thinner liner material to minimize capacitance effects on electrical signals.
2Manufacturing precision
If liner thickness is increased to improve coverage, then coverage is improved, but parasitic capacitance increases
Solution Approach 1:
The liner coverage function is segmented across two distinct layers. The first liner layer provides primary coverage and diffusion barrier function with greater thickness, while the second liner layer provides additional coverage extension with lesser thickness, achieving comprehensive coverage without excessive overall thickness that would increase capacitance.
Solution Approach 2:
The liner structure uses composite material composition with at least two different liner materials having different physical properties. This allows optimization of coverage characteristics in different regions while controlling the overall electrical characteristics to minimize parasitic capacitance effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the ability to prevent diffusion while minimizing parasitic capacitance, thereby improving the electrical stability and performance of TSVs in semiconductor devices.
Implementation Method 1
depositing a first liner extending into the opening; depositing a second liner over the first liner
Implementation Method 2
depositing a first liner extending into the opening; depositing a second liner over the first liner
Data Source
AI summary
A method includes forming a plurality of dielectric layers over a semiconductor substrate, etching the plurality of dielectric layers and the semiconductor substrate to form an opening, depositing a first liner extending into the opening, and depositing a second liner over the first liner. The second liner extends into the opening. The method further includes filling a conductive material into the opening to form a through-via, and forming conductive features on opposing sides of the semiconductor substrate. The conductive features are electrically interconnected through the through-via.