Through Silicon Via Testing with Dual-Side Pads

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in semiconductor manufacturing lies in effectively testing and ensuring the functionality of through silicon vias (TSVs) in stacked-die devices, which are crucial for high-density connections but require reliable testing methods to guarantee their operational integrity.

Innovation Solution

A semiconductor structure with through silicon vias is developed, featuring test pads on both sides of the substrate, allowing for the formation and testing of TSVs through a method that includes forming dielectric layers, creating bond and test pads, and testing these pads to verify the functionality of both the active device and the TSVs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If through silicon vias are used to interconnect multiple devices vertically, then circuit density and connection efficiency are improved, but testing and verification of the vias become more difficult

Engineering Contradiction:
Improvecircuit densityVSAvoidtesting difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent divides the testing process into separate stages by providing test pads on both the front surface (first test pad) and back surface (second test pad) of the substrate. This segmentation allows independent testing of different via types: first vias can be tested from the front surface while second vias are tested from the back surface, making the testing process more manageable and less difficult despite the high density of vias.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces test pads as intermediary elements that facilitate the testing of through silicon vias. These test pads serve as accessible connection points on both surfaces of the substrate, enabling external testing equipment to verify via functionality without directly accessing the embedded vias themselves, thus resolving the testing difficulty.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple devices are stacked vertically in a single package, then integration density is improved, but ensuring operational integrity of connections becomes more challenging

Engineering Contradiction:
Improveintegration densityVSAvoidoperational integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements preliminary testing of through silicon vias during the manufacturing process by providing test pads that enable verification of via functionality before the devices are fully assembled and packaged. This preliminary action ensures that vias are functional early in the process, allowing for corrective measures if defects are found, thereby ensuring operational integrity of the stacked-device connections.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The test pads provide a feedback mechanism to verify the functionality of through silicon vias. By enabling electrical testing through these pads, the system can detect and report via defects, providing feedback that ensures the reliability of connections before final product completion, thus maintaining operational integrity in high-density stacked configurations.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10685907B2Semiconductor structure with through silicon via and method for fabricating and testing the same
Publication Date: 2020.06.16 UNITED MICROELECTRONICS CORP
  • US10685907B2 patent drawing
  • US10685907B2 patent drawing
  • US10685907B2 patent drawing

AI summary

A semiconductor structure with a through silicon via includes a substrate having a front side and a back side. The through silicon via penetrates the substrate. A device is disposed on the front side of the substrate. Numerous dielectric layers cover the front side. A first test pad for testing the device is disposed on the front side of the substrate. A second test pad for testing the through silicon via is disposed on the back side of the substrate. A method of fabricating and testing the semiconductor structure is also provided.