TSV Epitaxial Semiconductor Structure for Higher SBD Withstand Voltage

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Solution Overview

Problem

Schottky Barrier Diodes (SBDs) exhibit low withstand voltage performance due to their simple structure, limiting their application in power markets.

Innovation Solution

A semiconductor structure is developed, comprising a first epitaxial layer, a bonding layer, a silicon substrate, a through-silicon-via, and electrodes, where the second epitaxial layer is formed with a low dislocation density by epitaxial growth, enhancing the voltage withstand performance through dislocation annihilation in the through-silicon-via.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a simple Schottky Barrier Diode structure is used, then the device structure is simple and easy to manufacture, but the withstand voltage performance is low

Engineering Contradiction:
Improvestructure simplicityVSAvoidwithstand voltage performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The device is segmented into multiple functional layers: a first epitaxial layer for basic diode function, a thick silicon substrate for mechanical support and dislocation filtering, and a second epitaxial layer grown through the via for enhanced voltage withstand performance. This segmentation allows each layer to perform its specific function optimally.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The through-silicon-via acts as an intermediary structure that connects the first and second epitaxial layers while allowing dislocations to be filtered and annihilated within the via region. This intermediary structure enables the transmission of beneficial effects (low dislocation density) while blocking harmful ones (high dislocation density from the first layer).

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a thick silicon substrate is used to filter dislocations, then the dislocation density is reduced and voltage withstand performance is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improvevoltage withstand performanceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The thick silicon substrate is prepared in advance with a controlled thickness (greater than 100 μm) before the second epitaxial layer is grown. This preliminary preparation ensures that dislocations are filtered and annihilated before the second layer is formed, simplifying the overall manufacturing process by preventing rather than correcting dislocation issues later.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The thickness of the silicon substrate is changed to a specific range (greater than 100 μm) to optimize dislocation filtering. This parameter change transforms the substrate from a simple support structure to an active dislocation filter, improving reliability without requiring complex additional structures.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the second epitaxial layer is grown to fill the through-silicon-via, then dislocations are annihilated and low dislocation density is achieved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvedislocation densityVSAvoidmanufacturing process simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The second epitaxial layer self-organizes to fill the through-silicon-via during the epitaxial growth process. The growth conditions are controlled so that the layer naturally extends into and fills the via, eliminating the need for separate filling operations and simplifying the manufacturing process while achieving low dislocation density.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The structure improves the quality of the second epitaxial layer, thereby enhancing the voltage withstand performance and reducing leakage current in semiconductor devices.

Implementation Method 1

a bonding layer, disposed on the first epitaxial layer, and provided with a first through-hole exposing the first epitaxial layer; a silicon substrate, disposed on a side of the bonding layer away from the first epitaxial layer, the first epitaxial layer and the silicon substrate being bonded through the bonding layer

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

a through-silicon-via in the silicon substrate, the through-silicon-via communicating with the first through-hole; a second epitaxial layer, disposed on the first epitaxial layer exposed by the first through-hole... When the second epitaxial layer is formed by epitaxial growing the first epitaxial layer, dislocations in the second epitaxial layer are bent and annihilated in a sidewall or inside of the through-silicon-via

Methodology Applied
Scientific EffectDislocation annihilation:

Implementation Method 3

When the second epitaxial layer is formed by epitaxial growing the first epitaxial layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20230290886A1Semiconductor structures and manufacturing methods thereof
Publication Date: 2023.09.14 ENKRIS SEMICON
  • US20230290886A1 patent drawing
  • US20230290886A1 patent drawing
  • US20230290886A1 patent drawing

AI summary

Semiconductor structures and manufacturing methods thereof. A semiconductor structure includes: a first epitaxial layer; a bonding layer, on first epitaxial layer and provided with a first through-hole exposing first epitaxial layer; a silicon substrate, on a side of bonding layer away from first epitaxial layer, first epitaxial layer and the silicon substrate being bonded through the bonding layer; a through-silicon-via, in silicon substrate, through-silicon-via communicating with first through-hole; a second epitaxial layer, on first epitaxial layer exposed by first through-hole; a first electrode, on a side of first epitaxial layer away from bonding layer, and electrically coupled with first epitaxial layer; a second electrode, on a side of second epitaxial layer away from first epitaxial layer, and electrically coupled with second epitaxial layer.