TSV Etching Profile Control via Cyclic Polymer Passivation

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Solution Overview

Problem

Current methods for etching through-silicon vias (TSVs) face challenges in achieving controlled sidewall profiles and taper angles, leading to defects and poor electrical performance due to improper etching process parameter control and chemical precursor management.

Innovation Solution

A method involving cyclic polymer passivation layer deposition and depassivation processes, combined with plasma etching, is employed to control sidewall profiles and via depth by managing process pressure and RF bias power, ensuring anisotropic etching and desired taper angles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If conventional plasma etching is used to etch deep TSVs, then etching depth can be achieved, but sidewall profile control deteriorates leading to uncontrolled taper angles and defects

Engineering Contradiction:
Improvevia depthVSAvoidsidewall profile control
Core Design Contradiction:
Length of stationary objectVSManufacturing precision

Solution Approach 1:

The patent implements a cyclic process alternating between polymer passivation deposition and plasma etching steps. The polymer deposition occurs periodically to form protective layers on sidewalls, followed by plasma etching to remove material. This periodic alternation enables controlled deep etching while maintaining precise sidewall profile and taper angle through the protective polymer coating that prevents excessive lateral etching.

Inventive Principle:
Principle #19Periodic action

2Productivity

If high RF power is used during etching to increase etching rate, then productivity improves, but defect formation increases due to grass type defects and insufficient depth control

Engineering Contradiction:
Improveetching rateVSAvoidvia quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a polymer passivation layer as an intermediary protective coating on the via sidewalls during plasma etching. This polymer layer acts as a mediator that protects the silicon sidewalls from direct plasma attack, preventing grass-type defects and maintaining via depth control even at high RF powers. The polymer coating enables high productivity etching rates while ensuring via quality by preventing direct plasma-silicon interactions that cause defects.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If improper chemistry or process parameters are used, then etching speed increases, but sidewall defects such as scallops and striations are formed

Engineering Contradiction:
Improveetching speedVSAvoidsidewall smoothness
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies polymer passivation deposition as a preliminary protective action before plasma etching begins. The polymer layer is deposited in advance to coat the via sidewalls, creating a protective barrier that prevents direct plasma attack on the silicon. This preliminary protection enables faster etching speeds while maintaining smooth sidewalls without scallops or striations, as the polymer layer buffers the etching process and prevents direct plasma-silicon interactions.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise control of sidewall profiles and via depth, reducing defects and improving electrical performance by maintaining a desired anisotropic etching process and achieving consistent taper angles between 85 to 90 degrees.

Implementation Method 1

forming a polymer passivation layer on sidewall and a bottom of the vias formed in the substrate by supplying a polymer passivation gas mixture into the processing chamber

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

performing a first etching process on a substrate in a processing chamber to form vias in the substrate

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 3

performing a plasma etching process

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 4

removing a portion of the polymer passivation layer formed on the bottom of the vias by a depassivation gas mixture supplied into the processing chamber

Methodology Applied
Scientific EffectChemical reactions: Chemical Bonding

Data Source

PatentUS8987140B2Methods for etching through-silicon vias with tunable profile angles
Publication Date: 2015.03.24 APPLIED MATERIALS INC
  • US8987140B2 patent drawing
  • US8987140B2 patent drawing
  • US8987140B2 patent drawing

AI summary

The present disclosure provides methods for etching through-silicon vias (TSVs) in a substrate. The method employs a cyclic polymer passivation layer deposition, depassivation process and plasma etching process. By alternating the duration performed in the plasma etching process and the polymer passivation deposition process during the TSVs formation process, a good sidewall profile and via depth control may be obtained.