TSV Grounded QFN Semiconductor Package for High-Frequency Gain
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional quad flat no-lead (QFN) packages for CMOS power amplifiers face challenges with grounding, leading to high-frequency gain drops due to source de-generation, which cannot be compensated by high-voltage MOS devices.
Innovation Solution
A semiconductor package design featuring a leadframe with a die pad, integrated circuit (IC) die, through substrate vias (TSVs), and bond wires, where the IC die is mounted using a conductive adhesive layer, and TSVs provide electrical connection between the die pad and circuit blocks, reducing grounding path length and improving source impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional leadframe packages with down bonds are used for CMOS power amplifiers, then the package structure is simple and easy to manufacture, but high-frequency gain drops due to source de-generation that cannot be compensated
Solution Approach 1:
The invention extracts and removes the down bond from the package structure. By eliminating this component, the source de-generation effect is eliminated, allowing high-frequency gain to be improved without the limitation of the conventional leadframe grounding approach.
Solution Approach 2:
The invention transitions from a planar leadframe grounding structure to a three-dimensional wirebond grounding structure. The ground connection is established by wirebonds connecting the ground pad to the ground bar, creating a vertical/dimensional connection path that reduces inductance and improves high-frequency performance.
2Area of stationary object
If QFN packages are used to reduce footprint size, then board space is saved and miniaturization is achieved, but grounding performance deteriorates leading to source de-generation
Solution Approach 1:
The invention introduces wirebonds as an intermediary element to achieve effective grounding in a compact QFN package. The wirebonds serve as flexible connectors that can achieve low-inductance ground connections without requiring large package dimensions, thus maintaining both small footprint and good grounding performance.
3Power
If high-voltage MOS devices are used to compensate for gain drop, then power handling capability is improved, but the source de-generation effect cannot be eliminated
Solution Approach 1:
The invention removes the down bond that causes source de-generation. By eliminating this component, the fundamental cause of high-frequency gain drop is removed, allowing high-voltage MOS devices to operate at their full power handling capability without being limited by grounding-induced de-generation effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances transmitter output power by 0.7 dBm per chain while maintaining a smaller form factor, improving electrical performance and thermal efficiency.
Implementation Method 1
The IC die is mounted on the die pad by using a conductive adhesive layer. The at least one TSV comprises a protruding tip extending into the conductive adhesive layer, and wherein the at least one circuit block is electrically connected to the die pad through the at least one TSV.
Data Source
AI summary
A semiconductor package includes a leadframe having a die pad and lead terminals along a perimeter of the die pad, and an IC die mounted on the die pad. The IC die includes I/O pads disposed on an active front surface of the IC die. The IC die includes a semiconductor substrate, a circuit block fabricated on the semiconductor substrate, and a through substrate via (TSV) extending through a thickness of the semiconductor substrate. Bond wires extend between the I/O pads and the lead terminals, respectively. A molding compound encapsulates the IC die, the bond wires, and the leadframe.