Funnel-Shaped Through Silicon Via Layout for Lower Contact Resistance
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to reduce contact resistance in through silicon vias (TSVs) while maintaining the integration density and device performance in stacked semiconductor devices.
Innovation Solution
The solution involves modifying the guard ring structure by increasing the distance between certain closed-loop structures in the guard ring to accommodate a funnel-shaped opening for the TSV, which includes a liner, barrier layer, and alloy portion, resulting in a larger top surface area for the TSV, thereby reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the guard ring structure is modified to increase the distance between closed-loop structures to accommodate a funnel-shaped opening, then the top surface area of the TSV is increased and contact resistance is reduced, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies asymmetry by creating a non-uniform guard ring structure where the distance between closed-loop structures varies. Specifically, the distance between adjacent closed-loop structures is increased in regions where the funnel-shaped opening is formed, creating an asymmetric pattern that accommodates the expanded top surface area requirement while maintaining compactness in other regions.
Solution Approach 2:
The patent implements local quality by modifying only specific portions of the guard ring structure rather than uniformly increasing all distances. The closed-loop structures are spaced farther apart only in the regions necessary to form the funnel-shaped opening, while maintaining closer spacing in other areas, thus locally optimizing the structure for reduced contact resistance without unnecessarily increasing overall complexity.
2Reliability
If a funnel-shaped opening with larger top surface area is formed for the TSV, then contact resistance is reduced by up to 20%, but the manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by pre-defining the funnel-shaped opening geometry through the asymmetric guard ring structure before TSV formation. The closed-loop structures are positioned in advance to create the desired funnel shape, ensuring that the top surface area is sufficiently large for low contact resistance while establishing precise dimensional boundaries that guide subsequent manufacturing steps.
Solution Approach 2:
The patent utilizes dimensionality change by transitioning from a uniform cross-sectional opening to a funnel-shaped opening with varying dimensions along the vertical axis. The opening has a smaller cross-section at the substrate level and expands to a larger top surface area, effectively using the vertical dimension to achieve both low contact resistance and manufacturable geometry.
3Reliability
If the distance between closed-loop structures is increased to form the funnel-shaped opening, then the top surface area of the TSV is enlarged, but the integration density is reduced
Solution Approach 1:
The patent applies local quality by concentrating the increased spacing between closed-loop structures only in the specific regions necessary to form the funnel-shaped opening. Other regions of the guard ring maintain closer spacing, thus locally optimizing for low contact resistance while preserving overall integration density across the device structure.
Solution Approach 2:
The patent uses asymmetry to create an uneven distribution of spacing between closed-loop structures. The asymmetric pattern allows for larger top surface area where needed for the TSV contact while maintaining compact dimensions in other directions, thereby reducing the impact on integration density compared to a uniform expansion approach.
Data Source
AI summary
A semiconductor device structure and methods of forming the same are described. The structure includes a through silicon via disposed through a dielectric material, an interconnection structure, and a substrate. The through silicon via has a top surface having a first diameter and a portion located in the substrate having a second diameter, and the first diameter is substantially greater than the second diameter. The structure further includes an alloy portion surrounding the through silicon via, a barrier layer surrounding the alloy portion, and a liner surrounding the barrier layer. The through silicon via, the alloy portion, the barrier layer, and the liner together have a funnel shaped cross-section.