TSV Guard Ring Doped Regions for Noise Coupling Reduction

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Solution Overview

Problem

Conventional through silicon via (TSV) structures in semiconductor packages suffer from noise coupling due to their insulating liners, which interfere with high-speed and analog circuits, affecting overall performance in high-speed applications.

Innovation Solution

The semiconductor package structure incorporates at least two guard ring doped regions adjacent to the TSV interconnect structure, with different types of doped regions configured to transmit noise signals to a ground terminal, effectively reducing noise coupling by utilizing an insulating layer and conductive material within the TSV structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an insulating liner is used in the TSV structure, then the electrical impedance is reduced, but noise coupling occurs between high-speed circuits and analog circuits

Engineering Contradiction:
Improveelectrical impedance controlVSAvoidnoise coupling
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a guard ring doped region as an intermediary element between the TSV and the surrounding circuits. This guard ring acts as a mediator that intercepts and shunts noise signals to ground, preventing the coupling of noise between high-speed and analog circuits while maintaining the electrical impedance benefits of the insulating liner.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the noise signal from the circuit by introducing the guard ring doped region that specifically targets and removes noise components. The guard ring separates the noise pathway from the signal pathway, allowing noise to be diverted to ground while preserving the functional signal integrity.

Inventive Principle:
Principle #2Taking out (Extraction)

2Object-affected harmful factors

If guard ring doped regions are added to reduce noise coupling, then noise interference is reduced, but device complexity increases

Engineering Contradiction:
Improvenoise interferenceVSAvoidstructure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the guard ring doped region formation with the existing TSV fabrication process. The guard ring is formed using the same doping steps and process sequence as the TSV structure, integrating multiple functions into a unified process flow rather than adding separate fabrication steps.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The insulating liner serves multiple functions: it provides electrical impedance control for the TSV and simultaneously acts as a mask during the guard ring formation process. This multi-functionality reduces the need for additional process steps and materials, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces noise interference by transmitting noise signals to a ground terminal, enhancing the performance of semiconductor packages in high-speed applications without requiring additional fabrication steps.

Implementation Method 1

the guard ring doped regions are configured to transmit noise signals to a ground terminal

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentEP3048642B1Semiconductor package structure and method for forming the same
Publication Date: 2020.01.08 MEDIATEK INC
  • EP3048642B1 patent drawingFigure 1
  • EP3048642B1 patent drawingFigure 2A
  • EP3048642B1 patent drawingFigure 2B

AI summary

A semiconductor package structure and method for forming the same are provided. The semiconductor package structure includes a substrate (200) and the substrate has a front side and a back side. The semiconductor package structure includes a through silicon via (TSV) interconnect structure (230) formed in the substrate; and a first guard ring doped region (242) and a second guard ring doped region (244) formed in the substrate, and the first guard ring doped region and the second guard ring doped region are adjacent to the TSV interconnect structure.