TSV Guard Ring Structure for Stress Isolation and Smooth Via Walls

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Solution Overview

Problem

Existing protective structures for through-silicon vias (TSVs) in integrated circuits (ICs) fail to adequately absorb or isolate stress, leading to delamination and failures.

Innovation Solution

A guard ring structure is introduced around the TSV, surrounded by a top metal feature, which eliminates stray capacitance and absorbs stress through dielectric layers, ensuring a smooth inner surface and sufficient spacing to prevent damage to surrounding structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If TSVs are formed to route electrical signals, then signal routing capability is improved, but stress is generated on surrounding structures causing delamination

Engineering Contradiction:
Improvesignal routingVSAvoidstress on surrounding structures
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces dielectric layers and protective structures as intermediary elements between the TSV and surrounding structures. These intermediaries absorb and isolate the stress generated by TSV formation, preventing direct transmission of stress to adjacent circuit elements while maintaining the TSV's signal routing function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protective structure is segmented into multiple functional layers including inner and outer protective structures, dielectric layers, and stress-absorbing materials. This segmentation allows each layer to address specific aspects of stress management, with the inner structure providing close protection and the outer structure providing broader stress distribution.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12354975B2Guard ring structure
Publication Date: 2025.07.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12354975B2 patent drawing
  • US12354975B2 patent drawing
  • US12354975B2 patent drawing

AI summary

Integrated circuit (IC) structures and methods for forming the same are provided. An IC structure according to the present disclosure includes a substrate, an interconnect structure over the substrate, a guard ring structure disposed in the interconnect structure, a via structure vertically extending through the guard ring structure, and a top metal feature disposed directly over and in contact with the guard ring structure and the via structure. The guard ring structure includes a plurality of guard ring layers. Each of the plurality of guard ring layers includes a lower portion and an upper portion disposed over the lower portion. Sidewalls of the lower portions and upper portions of the plurality of guard ring layers facing toward the via structure are substantially vertically aligned to form a smooth inner surface of the guard ring structure.