Through-Silicon Vias Filled with Interdiffusion Conductive Elements
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Solution Overview
Problem
Existing techniques for fabricating through-silicon vias (TSVs) face challenges with incomplete metallization and long manufacturing times, particularly for high-aspect ratio TSVs, leading to yield losses and defects in large integrated circuits.
Innovation Solution
The use of interdiffusion conductive elements with a re-melt temperature of at least 450 degrees Celsius, formed by heating a mixture of metals like indium and silver or tin and copper, which are processed at lower temperatures to fill TSVs efficiently, avoiding voids and reducing processing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If sputtering or conformal deposition techniques are used to fill TSVs, then the TSVs can be filled with conductive material, but voids form leading to incomplete metallization particularly in high-aspect ratio TSVs
Solution Approach 1:
The patent changes the physical state parameter of the fill material from solid (conventional sputtering/plating) to liquid (molten metal). The molten metal is injected into TSVs at temperatures above its melting point, allowing it to flow and completely fill high-aspect ratio vias without voids, then solidifies upon cooling to form continuous conductive paths.
Solution Approach 2:
The patent utilizes phase transitions of the fill material. The metal is heated to transition from solid to liquid phase for injection and filling, then cooled to transition back to solid phase, forming a complete and void-free conductive structure in the TSVs.
2Manufacturing precision
If conventional plating techniques are used to fill TSVs, then conductive material can be deposited, but the process time becomes undesirably long
Solution Approach 1:
The patent uses hydraulic principles by injecting molten metal as a liquid into the TSVs. This liquid injection method rapidly fills the vias under pressure, significantly reducing the filling time compared to conventional plating processes that require extended deposition times to build up sufficient conductive material.
Solution Approach 2:
The patent changes the temperature parameter to melt the fill material, enabling rapid liquid-phase injection. This phase change allows the filling process to occur much faster than solid-state plating, improving manufacturing throughput while ensuring complete via filling.
3Reliability
If high melting point conductive materials are used to fill TSVs, then the conductive elements can withstand subsequent processing temperatures, but the process wafer must be exposed to high temperatures
Solution Approach 1:
The patent uses composite material structures where a low-melting-point metal (e.g., solder) is combined with a high-melting-point metal (e.g., copper, tungsten, or molybdenum). The low-melting-point metal wets the TSV walls and provides good electrical conductivity at lower temperatures, while the high-melting-point metal reinforcement embedded within provides thermal stability and structural strength during subsequent high-temperature processing.
Solution Approach 2:
The patent applies local quality by distributing high-melting-point metal particles or wires strategically within the TSV fill. The high-melting-point material is concentrated where thermal stability is most needed (in the bulk of the via fill), while the low-melting-point metal provides conductivity throughout, optimizing both thermal resistance and electrical performance without requiring uniform high-temperature exposure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures reliable filling of TSVs with high-aspect ratio conductors, reducing defects and yield losses by maintaining high melting points without exposing the process wafer to high temperatures, thus enhancing the manufacturing efficiency and stability of integrated circuits.
Implementation Method 1
The interdiffusion precursor is heated to an interdiffusion temperature for a sufficient period to form interdiffusion conductive elements having a re-melt temperature of at least 450 degrees Celsius
Implementation Method 2
A molten metal system is injected into the through-silicon holes
Implementation Method 3
The first and second metals, which are provided in different states (phases), form the interdiffusion precursor
Data Source
AI summary
A silicon interposer includes a plurality of patterned metal layers formed on a silicon wafer portion and a plurality of through-silicon vias extending through the silicon wafer portion. The through-silicon vias have an interdiffusion conductive element.