TSV Isolation Structure Using CVD and Anisotropic Surface Treatment
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Solution Overview
Problem
In sub-nanometer semiconductor devices, the high aspect ratio of through silicon vias (TSVs) leads to non-uniform distribution of liner oxide layers, causing stress and electrical connection issues, and existing thermal oxidation processes are limited by high temperatures and additional oxide formation on silicon substrates, which can damage doped regions or metal layers.
Innovation Solution
A method involving chemical vapor deposition to form isolation layers with differential surface chemical properties through anisotropic surface treatment, ensuring uniform step coverage and preventing unwanted oxide formation, using sub-atmospheric pressure and specific gases like TEOS, followed by additional deposition to enhance conformality and prevent substrate damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a liner oxide layer is formed on the sidewall and bottom surface of the TSV to isolate metallic material, then electrical isolation is achieved, but the thickness of the liner oxide layer is not uniformly distributed due to high aspect ratio
Solution Approach 1:
The isolation structure is divided into multiple segments: a first isolation layer formed by CVD, followed by anisotropic surface treatment to create differential surface chemical properties, and then a second isolation layer formed by another CVD process. This segmentation allows each layer to contribute differently to the overall isolation, with the first layer providing base coverage and the second layer enhancing uniformity after the surface treatment modifies the underlying layer's reactivity.
Solution Approach 2:
The anisotropic surface treatment process creates local quality differences on the surface of the first isolation layer by inducing differential surface chemical properties in different regions. This allows subsequent deposition to proceed at different rates on different surfaces (sidewall vs. bottom), compensating for the non-uniform geometry of the high aspect ratio TSV and achieving uniform final thickness.
2Manufacturing precision
If thermal oxidation process is used to enhance uniformity of liner oxide layer thickness, then thickness uniformity is improved, but additional oxide layers are formed on the silicon substrate surface requiring additional removal steps
Solution Approach 1:
The harmful effect of unwanted oxide formation on the substrate surface is extracted and eliminated by replacing the thermal oxidation process with chemical vapor deposition. The CVD process forms isolation layers only on the trench structures where needed, without forming unwanted oxide layers on the surrounding silicon substrate surface, thus removing the need for additional cleaning steps.
Solution Approach 2:
The first isolation layer formed by CVD acts as an intermediary that covers the trench structures. Subsequent anisotropic surface treatment modifies this intermediary layer's surface properties, and the second isolation layer is then deposited on top. This intermediary approach allows precise control of isolation layer formation without affecting the surrounding substrate.
3Manufacturing precision
If thermal oxidation process is performed at relatively high temperature to improve uniformity, then thickness uniformity is enhanced, but doped regions and metal layers are damaged
Solution Approach 1:
The process parameters are fundamentally changed from high-temperature thermal oxidation to low-temperature chemical vapor deposition. The CVD process can be conducted at temperatures that do not damage sensitive doped regions or metal layers, while still achieving uniform isolation layer thickness through the combination of multiple deposition steps and anisotropic surface treatment that controls deposition kinetics.
Solution Approach 2:
The thermal field (heat-based oxidation) is replaced with a chemical field (CVD process). Instead of using high temperature to drive oxidation reactions, the invention uses chemical vapor deposition where precursor gases react on the surface at lower temperatures, eliminating thermal damage while achieving the desired isolation layer uniformity through chemical control and surface treatment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves excellent step coverage and isolating effects without damaging doped regions or metal layers, maintaining uniformity and performance in TSV fabrication, suitable for both two-dimensional and three-dimensional semiconductor devices.
Implementation Method 1
a first chemical vapor deposition process is performed to form a first isolation layer on the first surface of the substrate and the sidewall and the bottom surface of the trench
Implementation Method 2
an anisotropic surface treatment process is performed, so that a surface of the first isolation layer has differential surface chemical properties
Data Source
AI summary
A method of fabricating an isolation structure of a semiconductor device includes the following steps. Firstly, a substrate including a first surface and a second surface is provided. At least one trench is formed in the first surface of the substrate. The trench has a sidewall and a bottom surface. Then, a first chemical vapor deposition process is performed to form a first isolation layer on the first surface of the substrate and the sidewall and the bottom surface of the trench. Then, an anisotropic surface treatment process is performed, so that a surface of the first isolation layer has differential surface chemical properties. Afterwards, a second chemical vapor deposition process is performed to form a second isolation layer on the first isolation layer with a surface having differential surface chemical properties.