TSV Landing Structure for Reliable Small-Via Alignment
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Solution Overview
Problem
The challenge in integrated circuit semiconductor devices is forming through silicon vias (TSVs) reliably, as reducing TSV size complicates their formation and connection within the substrate, particularly due to the need for precise alignment and width variations in TSV landing parts and holes.
Innovation Solution
The integrated circuit semiconductor device incorporates TSV landing parts with a wider lower portion than upper portion, buried into trenches and aligned with TSV holes, allowing for easier and reliable formation of TSVs by ensuring mechanical and electrical connection, using conductive layers and insulation layers within the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If TSV size is reduced to achieve higher integration, then device integration density is improved, but manufacturing reliability deteriorates due to alignment precision requirements
Solution Approach 1:
The TSV landing part is designed with non-uniform width, being wider at the lower portion (near substrate bottom) and narrower at the upper portion. This local variation in geometry provides better alignment tolerance and mechanical support where needed (at the connection point with TSV) while maintaining overall compactness, thus resolving the contradiction between small TSV size and reliable formation
Solution Approach 2:
The TSV landing part is pre-formed in the substrate before TSV fabrication. This preliminary structure serves as a guide and support feature that facilitates subsequent TSV alignment and formation, reducing the difficulty of precise alignment required for small TSVs and improving manufacturing reliability
2Reliability
If TSV landing part width is varied to improve alignment, then TSV connection reliability is improved, but device complexity increases
Solution Approach 1:
Instead of making the entire TSV landing part complex, only the width dimension varies locally along the vertical axis. The structure remains simple in other aspects (continuous material, regular shape), providing enhanced alignment and connection reliability without significantly increasing overall device complexity
Solution Approach 2:
The TSV landing part employs asymmetric width distribution (wider at bottom, narrower at top) rather than uniform symmetry. This asymmetric design optimizes the connection interface with TSV while maintaining manufacturing simplicity, resolving the contradiction between connection reliability and device complexity
Data Source
AI summary
An integrated circuit semiconductor device includes a substrate including a first surface and a second surface opposite the first surface, a trench in the substrate, the trench extending from the first surface of the substrate toward the second surface of the substrate, a through silicon via (TSV) landing part in the trench, the TSV landing part having a first portion spaced apart from the first surface of the substrate, and a second portion between the first portion and the first surface of the substrate, the first portion being wider than the second portion, a TSV hole in the substrate, the TSV hole extending from the second surface of the substrate and aligned with a bottom surface of the TSV landing part, and a TSV in the TSV hole and in contact with the bottom surface of the TSV landing part.