Through Substrate Via Testing for Semiconductor Yield
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Solution Overview
Problem
Conventional semiconductor device manufacturing processes fail to detect low-yielding through substrate vias (TSVs) before stacking, leading to attachment of 'good' daughter ICs to 'bad' mother ICs, which reduces overall yield and increases costs.
Innovation Solution
The method involves forming and testing TSVs before stacking by creating test TSVs that form loopback paths, allowing for characterization of TSV fabrication and identification of 'good' or 'bad' mother ICs by probing these paths, ensuring only 'good' ICs are used for stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TSV testing is performed only after daughter IC attachment, then the manufacturing process follows conventional stacking procedures, but low-yielding TSVs cannot be detected before stacking causing reduced overall yield
Solution Approach 1:
The patent forms test TSVs and creates loopback paths before the stacking process to enable preliminary testing of TSV functionality. This allows detection of low-yielding TSVs before daughter ICs are attached, preventing waste of good daughter ICs on bad mother ICs while maintaining conventional stacking throughput.
Solution Approach 2:
The patent introduces test TSVs as intermediary elements that form loopback paths within the mother IC substrate. These test TSVs serve as mediators to enable electrical testing of TSV functionality before stacking, without interfering with the actual signal TSVs used for daughter IC interconnection.
2Reliability
If test TSVs are formed in the scribe area, then TSV testing can be performed before stacking, but the device structure becomes more complex
Solution Approach 1:
The patent applies local quality by forming test TSVs specifically in the scribe area between IC dies, while signal TSVs are formed in the IC dies themselves. This spatial differentiation allows test functionality to be added locally without affecting the overall device structure or requiring changes to the main IC die areas.
Solution Approach 2:
The patent creates test TSVs as copies of the signal TSV structure but places them in the scribe area where they form loopback paths. These test TSVs replicate the essential TSV characteristics needed for testing without requiring full functional IC structures, reducing the complexity overhead.
3Reliability
If loopback paths are created for TSV testing, then TSV functionality can be characterized before stacking, but additional metal patterning steps are required
Solution Approach 1:
The patent merges the test TSV formation process with the existing TSV fabrication process. The same via formation, metal deposition, and patterning steps used for signal TSVs are also applied to create test TSVs and their loopback paths, combining multiple functions into a single integrated manufacturing flow rather than requiring separate process steps.
Data Source
AI summary
Methods for making and testing a semiconductor device with through substrate vias are described. In some examples, a method of making a semiconductor device includes: forming through substrate vias (TSVs) in a substrate having an integrated circuit (IC) die, the substrate including an active side and a backside, the active side having conductive interconnect formed thereon, the TSVs including exposed portions on the backside of the substrate; patterning first metal on the active side of the substrate to electrically couple the TSVs to a portion of the conductive interconnect; and coupling the exposed portions of the TSVs on the backside of the substrate to electrically couple together the plurality of TSVs.