MEMS Micromirror Arrays Using TSV Carrier Wafer Interconnects
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Solution Overview
Problem
Existing MEMS micromirror arrays face challenges in achieving larger mirror rotation angles and higher filling factors due to difficulties in fabricating powerful vertical comb drive actuators with small air gaps and tall comb fingers, as well as routing electrical interconnection wires across the chip surface, leading to fragile chip structures and limited scalability.
Innovation Solution
The use of a carrier wafer with Through Silicon Via (TSV) technology for electrical interconnections and self-alignment silicon etching processes allows for smaller air gaps and taller comb fingers, enabling larger mirror rotation angles at lower actuation voltages, while also facilitating high-density electrical connections for higher filling factors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the air gaps between adjacent comb fingers are made as small as possible and the comb finger height is made as tall as possible to increase actuation capacity and mirror rotation angle, then the aspect ratio geometry becomes extremely high, making the etching of silicon oxide between the fingers extremely difficult or impossible
Solution Approach 1:
The patent introduces a carrier wafer layer above the comb fingers to provide a new dimension for electrical interconnection. This allows the comb fingers to be etched with standard thickness without requiring extremely thin air gaps, as the carrier wafer provides an alternative path for electrical connections. The carrier wafer acts as a third dimension that resolves the conflict between high aspect ratio geometry and manufacturability.
Solution Approach 2:
The carrier wafer serves as an intermediary element between the comb fingers and the electrical interconnection wires. Instead of directly routing wires through the high aspect ratio gaps between comb fingers, the carrier wafer mediates this connection by providing a separate layer where wires can be routed more easily, thus solving the fabrication difficulty.
2Ease of operation
If the same silicon-silicon oxide-silicon material is used for electrical interconnection wires and mirror structures, then the material compatibility is good, but the routing of electrical interconnection wires becomes increasingly difficult as the mirror array size increases
Solution Approach 1:
The patent uses the carrier wafer as an additional dimension to route electrical interconnection wires. By moving wire routing to this separate dimension (the carrier wafer layer), the complexity of routing wires across the mirror array surface is significantly reduced. The carrier wafer provides a dedicated pathway that separates wire routing from the mirror array layout.
Solution Approach 2:
The patent segments the electrical interconnection function by using the carrier wafer as a separate layer for wire routing. This segmentation allows the mirror array to be designed independently from the wire routing, reducing the mutual complexity and enabling larger mirror array configurations.
3Reliability
If thicker silicon oxide layer is used for electrical isolation between upper and lower comb fingers to achieve larger rotation mirror angle at higher actuation voltage, then the electrical isolation is improved, but the etching of silicon oxide between the fingers becomes extremely difficult
Solution Approach 1:
The carrier wafer acts as an intermediary that allows thicker silicon oxide layers to be used for electrical isolation without compromising manufacturability. By providing an alternative layer for electrical connections, the carrier wafer enables the use of thicker oxide layers between comb fingers while still allowing proper electrical isolation and connection.
Solution Approach 2:
The carrier wafer introduces a new dimension that allows electrical isolation to be achieved through thicker oxide layers without the etching difficulties associated with high aspect ratio geometries. The carrier wafer provides a separate pathway that decouples the electrical isolation requirement from the etching difficulty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of larger micromirror arrays with higher filling factors and improved actuation capabilities, enhancing the scalability and reliability of MEMS micromirror arrays for applications like optical switches and display systems.
Implementation Method 1
U.S. Pat. Nos. 7,734,127B2, 7,386,201B1, 6,881,649B2 and 6,822,776B2 disclosed the micromirror and micromirror arrays actuated using electrostatic vertical comb drive actuators. Electrostatic actuation is favored due to its low power consumption and relative simple structure and small footprint.
Data Source
AI summary
A micromirror and micromirror array may have a first stationary structure, and a mirror structure connected to a first pivoting structure that pivots the mirror structure relative to the first stationary structure about a first axis of rotation. A first comb drive pivots the mirror structure about the first axis of rotation. The first comb drive has a first portion attached to the stationary structure and a second portion attached to the mirror structure, the first portion being electrically isolated from the second portion. The micromirror or micromirror array may be mounted to a Through Silicon Via (TSV) wafer having electrical connections that extend between a first side and a second side of the TSV wafer such that the first and second portions of each comb drive are electrically connected to the electrical connections.