Through Substrate Via Metallization Using Nitridation and Reflow

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Solution Overview

Problem

Conventional lithography struggles to create smaller structures in modern integrated circuitry, and three-dimensional packaging technologies face challenges in achieving faster interconnects due to high aspect ratio through-silicon vias, which result in voids and reduced reliability in metallization.

Innovation Solution

A method involving a nitridation process to convert a metallic barrier layer into a nitride surface layer, enhancing nucleation for subsequent metal depositions, and a thermal anneal step to reflow metal layers, resulting in improved wettability and reduced voids in through-silicon vias.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional lithography is used to create smaller structures, then manufacturing precision deteriorates, but device scaling is required to improve performance

Engineering Contradiction:
Improvestructure fabrication precisionVSAvoidtransistor dimension
Core Design Contradiction:
Manufacturing precisionVSLength of moving object

Solution Approach 1:

The patent transitions from planar 2D lithography to 3D vertical via structures, using depth dimension to achieve interconnect functionality that lateral scaling cannot provide. The TSV structure exploits the third dimension to create high-density interconnections without relying solely on reducing lateral dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes material parameters by introducing nitride surface layers on metallic barrier layers, which fundamentally alters the surface properties to enhance nucleation and wetting behavior, enabling reliable metal fill in high aspect ratio vias where conventional approaches fail.

Inventive Principle:
Principle #35Parameter changes

2Length of moving object

If high aspect ratio through-silicon vias are used to reduce interconnect length, then connection speed improves, but void formation increases and reliability deteriorates

Engineering Contradiction:
Improveinterconnect lengthVSAvoidmetallization reliability
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The nitridation process is performed as a preliminary treatment before metal deposition, converting the metallic barrier layer surface to a nitride surface that pre-establishes enhanced nucleation properties. This preliminary action ensures subsequent metal layers will properly wet and fill the high aspect ratio via without voids.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the surface chemical composition and properties of the barrier layer by converting it to a nitride surface, which fundamentally improves wetting and nucleation parameters. This parameter change enables reliable metal fill in geometries where conventional surfaces would fail.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If thermal anneal is applied to reflow metal layers, then wettability improves and voids are reduced, but process complexity increases

Engineering Contradiction:
Improvemetal fill qualityVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the nitridation surface treatment with the existing metallic barrier layer deposition into a single integrated process sequence. The thermal anneal step serves dual purposes: completing the nitridation reaction and providing the reflow treatment needed for metal wetting, thereby reducing overall process complexity despite adding functional capability.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the quality of Cu metal fill in through-silicon vias, reducing voids by more than 50% and improving the reliability of interconnections between semiconductor chips.

Implementation Method 1

A nitridation process converts a surface portion of the metallic barrier layer to a nitride surface layer

Methodology Applied
Scientific EffectNitridation: Nitriding

Implementation Method 2

A thermal anneal step to reflow a portion of the first metal layer on the horizontal field area into the through substrate via

Methodology Applied
Scientific EffectThermal annealing: Annealing

Implementation Method 3

A thermal anneal step to reflow a portion of the first metal layer

Methodology Applied
Scientific EffectReflow: Melting

Data Source

PatentUS10312181B2Advanced through substrate via metallization in three dimensional semiconductor integration
Publication Date: 2019.06.04 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10312181B2 patent drawing
  • US10312181B2 patent drawing
  • US10312181B2 patent drawing

AI summary

A method providing a high aspect ratio through substrate via in a substrate is described. The through substrate via has vertical sidewalls and a horizontal bottom. The substrate has a horizontal field area surrounding the through substrate via. A metallic barrier layer is deposited on the sidewalls of the through substrate via. A nitridation process converts a surface portion of the metallic barrier layer to a nitride surface layer. The nitride surface layer enhances the nucleation of subsequent depositions. A first metal layer is deposited to fill a portion of the through substrate via and cover the horizontal field area. A thermal anneal step to reflow a portion of the first metal layer on the horizontal field area into the through substrate via. A second metal layer is deposited over the first metal layer to fill a remaining portion of the through substrate via. Another aspect of the invention is a device created by the method.