TSV Substrate Noise Testing Using Excitation and Response Links
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Solution Overview
Problem
The impact of noise introduced by through silicon vias (TSVs) on chip performance during 3D stacking is significant, necessitating efficient and accurate noise testing methods for substrates with TSVs to analyze failure and reliability.
Innovation Solution
A device and method involving an excitation link with at least two groups of second TSVs and a testing link with at least one group of third TSVs, connected through an insulation layer, to apply a pulse signal and measure noise levels and distribution using response signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If noise testing of substrate with TSVs is performed using conventional methods, then noise impact on chip performance can be detected, but the testing process is complex and analysis of failure and reliability is difficult
Solution Approach 1:
The testing structure is segmented into distinct functional components: an excitation link with at least two groups of second TSVs for applying pulse signals, a testing link with at least one group of third TSVs for detecting response signals, and an insulation layer separating the excitation link from the substrate. This segmentation allows independent optimization of each component's function while simplifying the overall testing process and improving noise measurement accuracy.
2Productivity
If TSV technique is used for 3D stacking of chips, then chip integration degree is improved and interconnect length is shortened, but noise from substrate introduced by TSV impacts chip performance
Solution Approach 1:
The patent converts the harmful noise generated by TSVs into a measurable signal for quality control. By intentionally designing the testing structure to detect noise from TSVs, the previously harmful effect becomes a diagnostic tool for identifying defective TSVs and substrates, thereby improving product reliability without compromising the integration benefits of TSV technology.
3Ease of operation
If simplified noise testing device is designed, then ease of operation and analysis is improved, but testing capability may be reduced
Solution Approach 1:
The testing structure is designed with multi-functionality where the excitation link and testing link can detect different aspects of noise and failure modes. The same basic structure supports both noise level measurement and distribution analysis, as well as failure location identification, thereby maintaining high measurement precision while simplifying operation through a unified testing platform.
Data Source
AI summary
Embodiments of the present disclosure provide a device and a method for noise testing of a substrate including through silicon vias (TSVs). The device may include a substrate including first TSVs; an excitation link including at least two groups of second TSVs; an insulation layer arranged between the excitation link and the substrate; and a testing link including at least one group of third TSVs, the testing link being electrically connected with the substrate.