TSV Pad Interlock Structure for Stress-Reliable Semiconductor Connections

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Solution Overview

Problem

Existing semiconductor devices face challenges in maintaining the reliability of the connection structure between through-silicon-vias (TSVs) and pads, which are prone to stress failure.

Innovation Solution

A semiconductor device design featuring a via that extends through a substrate with a trench filled by a pad, where the insulating layers lack an etch stop layer, ensuring direct contact between passivation and protective layers, and the pad securely locks the via, enhancing stability under stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional connection structure between TSV and pad is used, then the manufacturing process is simpler, but the reliability under stress is poor

Engineering Contradiction:
Improveconnection reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The via is designed to protrude through the substrate surface before the insulating layers are formed, and the trench is etched to expose the via. This preliminary positioning and exposure of the via structure allows the pad to be formed with direct contact to the via, establishing a reliable connection before subsequent bonding processes occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The connection structure transitions from a planar interface to a three-dimensional configuration where the pad wraps around and contacts both the top face and sidewall of the via. This multi-dimensional contact geometry significantly improves mechanical interlocking and electrical connection reliability compared to conventional flat pad-TSV interfaces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If an etch stop layer is included between passivation and protective layers, then the manufacturing precision is improved, but the device complexity and manufacturing steps increase

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidlayer alignment precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The etch stop layer, which is conventionally used to control etching depth and protect underlying layers, is completely removed from the structure. Instead, the protective layer is directly formed on the passivation layer, simplifying the layer stack and reducing the number of manufacturing steps while maintaining adequate protection and alignment through direct layer contact.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The functions of the etch stop layer (etch protection, layer separation, and structural support) are merged into the direct interface between the passivation and protective layers. This consolidation eliminates the need for a separate etch stop layer while maintaining the necessary functional requirements through optimized layer design and processing.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the pad only contacts the top face of the via, then the manufacturing process is simpler, but the connection reliability under stress is reduced

Engineering Contradiction:
Improveconnection stabilityVSAvoidpad configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The via is designed to protrude through the substrate and insulating layers before final pad formation, and the trench is etched to expose both the top face and sidewall of the via. This preliminary exposure creates the necessary geometry for the pad to form contacts on multiple surfaces, ensuring reliable mechanical and electrical connection before bonding occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The pad configuration transitions from a single-plane contact to a multi-dimensional structure that contacts both the top face and sidewall of the via. This three-dimensional contact geometry provides superior mechanical interlocking and stress distribution compared to conventional top-face-only contacts, significantly improving connection reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12593715B2Semiconductor device and method for manufacturing the same
Publication Date: 2026.03.31 SAMSUNG ELECTRONICS CO LTD
  • US12593715B2 patent drawing
  • US12593715B2 patent drawing
  • US12593715B2 patent drawing

AI summary

A semiconductor device includes an insulating layer on a substrate; a via extending from within the substrate and extending through one face of the substrate and a bottom face of a trench defined in the insulating layer such that a portion of a sidewall and a top face of the via are exposed through the substrate; and a pad contacting the exposed portion of the sidewall and the top face of the via. The pad fills the trench. The insulating layer includes a passivation layer on the substrate, and a protective layer is on the passivation layer. An etch stop layer is absent between the passivation layer and the protective layer. A vertical level of a bottom face of the trench is higher than a vertical level of one face of the substrate and is lower than a vertical level of a top face of the passivation layer.