3D IC Cooling via TSVs and Partial Vias
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Solution Overview
Problem
Three-dimensional integrated circuits (3-D ICs) face challenges in efficiently dissipating heat, leading to elevated temperatures that reduce performance and reliability due to high thermal resistance and heat retention within the chip and inter-chip interfaces.
Innovation Solution
The implementation of through-silicon vias (TSVs) and thermally conductive partial vias (TCPVs) with barrier layers and thermally conductive materials to create an efficient heat transfer path, allowing for effective heat conduction from active devices to the backside of the chip and further dissipation through microvias and patterned thermally conductive regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional heat removal structures are used in 3-D ICs, then the chip can be fabricated with standard processes, but thermal resistance is high and heat dissipation is inefficient
Solution Approach 1:
The heat removal structure is segmented into multiple functional layers: TSVs for vertical heat transport, TCPVs for lateral heat distribution, and microvias for additional thermal pathways. This segmentation allows each component to optimize its function, collectively reducing thermal resistance and improving heat dissipation efficiency while maintaining reliability
Solution Approach 2:
The patent employs composite material structures combining highly thermally conductive materials (such as copper or diamond-like carbon) with electrically insulating but thermally conductive materials. This composite approach enables efficient heat transfer while providing electrical isolation, thereby reducing operating temperatures and improving reliability without compromising electrical functionality
2Loss of energy
If TSVs are used for heat removal, then heat conduction path is established, but electrical interference with active devices may occur
Solution Approach 1:
Electrically insulating but thermally conductive materials are used as intermediary layers between the conductive TSVs and the active devices. These intermediary materials act as thermal bridges while providing electrical isolation, enabling heat conduction without electrical interference
Solution Approach 2:
The patent applies different material properties to different regions: highly conductive materials are localized in heat transport pathways (TSVs, TCPVs), while electrically insulating but thermally conductive materials are positioned where electrical isolation is needed. This local differentiation allows simultaneous optimization of heat conduction and electrical isolation
3Loss of energy
If deep vias are created to reach active devices, then direct heat removal is possible, but fabrication complexity and cost increase
Solution Approach 1:
The heat removal pathway is segmented into shallow TSVs, lateral TCPVs, and microvias, avoiding the need for single deep through-vias. This segmentation reduces fabrication complexity by using multiple shallow etch and fill steps instead of one deep process, while maintaining effective heat removal efficiency
Solution Approach 2:
The patent transitions from purely vertical heat transport (single dimension) to a three-dimensional heat removal network incorporating lateral TCPVs and microvias. This multi-dimensional approach provides alternative heat pathways that reduce reliance on deep vertical vias, simplifying fabrication while maintaining or improving heat removal efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly reduces thermal resistance, enabling higher heat dissipation and lower operating temperatures, thereby enhancing the performance and reliability of 3-D ICs while being cost-effective and compatible with existing fabrication technologies.
Implementation Method 1
Each TCPV may also include a barrier layer deposited within at least a portion of the recess and deposited upon at least a portion, adjacent to the recess, of the back side of the chip, the barrier layer having a barrier layer thermal conductivity greater than a semiconductor material thermal conductivity. Each TCPV may also include a thermally conductive layer deposited upon at least a portion of the barrier layer, the thermally conductive layer having a thermal conductivity greater than a semiconductor material thermal conductivity.
Implementation Method 2
The structure may also include a plurality of through-silicon vias (TSVs) electrically connected to the active devices, extending from the back side to an active device side of the chip and configured to remove, by conduction from the active devices to the back side, heat from the chip.
Implementation Method 3
a structure configured to remove, by conduction from the plurality of active devices to the back side, heat from the chip
Data Source
AI summary
A chip fabricated from a semiconductor material is disclosed, which may include active devices located below a first depth from the chip back side, and a structure to remove heat from the active devices to the chip back side. The structure may include thermally conductive partial vias (TCPVs), which may include a recess with a depth, from the chip back side towards the active devices less than the first depth. Each TCPV may include a barrier layer deposited within the recess and deposited upon the back side of the chip. Each TCPV may also include a thermally conductive layer deposited upon the barrier layer. The structure may also include through-silicon vias (TSVs) electrically connected to active devices, extending from the back side to an active device side of the chip to conductively remove heat from the active devices to the back side of the chip.