Semiconductor Polishing Composition for TSV Dishing Control
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Solution Overview
Problem
Chemical mechanical polishing in semiconductor fabrication faces challenges in achieving flatness without defects like dishing and protrusion, especially when processing complex structures such as through silicon via (TSV), due to variations in process conditions and materials used.
Innovation Solution
A composition containing abrasive particles surface-modified with a silane composition and specific additives is applied to the polishing process, which maintains a controlled removal rate ratio of silicon oxide, silicon nitride, and copper layers to ensure precise polishing performance, minimizing defects and achieving flatness across multiple layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional polishing slurry is used for TSV structures, then polishing speed is maintained, but defects such as dishing and protrusion occur
Solution Approach 1:
The patent modifies the chemical composition parameters of the polishing slurry by incorporating specific organic acids (glycine, alanine, valine) and their derivatives, along with controlled pH levels (2-5), to optimize the removal rate ratio between copper and silicon oxide layers. This parameter adjustment enables precise control over material removal to prevent dishing and protrusion while maintaining polishing speed.
Solution Approach 2:
The invention uses a composite polishing slurry system combining abrasive particles (colloidal silica with 5-50 nm diameter) suspended in an aqueous solution containing multiple organic acid components. This composite formulation creates synergistic effects where the organic acids chemically modify the copper surface while the abrasives provide mechanical removal, achieving defect-free polishing of TSV structures.
2Productivity
If high removal rate is achieved for copper layers, then polishing efficiency is improved, but dishing of TSV structures worsens
Solution Approach 1:
The patent optimizes the removal rate ratio between copper and silicon oxide layers by controlling pH (2-5), organic acid concentration (0.1-10 g/L for each component), and abrasive particle diameter (5-50 nm). This parameter optimization achieves high copper removal rates while preventing dishing by maintaining the ratio within 0.5-2.0, balancing productivity with precision.
Solution Approach 2:
The organic acids (glycine, alanine, valine and derivatives) act as chemical intermediaries that selectively adsorb onto copper surfaces, forming a controlled reaction layer that facilitates uniform material removal. This intermediary chemical action prevents direct aggressive mechanical removal that would cause dishing, while still achieving high polishing efficiency through enhanced copper-copper bond weakening.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The composition effectively prevents excessive dishing and protrusion, ensuring accurate planarization and defect-free polishing of TSV structures, thereby enhancing the functionality and reliability of semiconductor devices.
Implementation Method 1
abrasive particles surface-modified with a silane composition
Implementation Method 2
Chemical mechanical polishing is a technique of polishing the surface of a sample to a desired level by injecting a polishing slurry into the interface between a polishing pad and a polishing target while rubbing the surface of the polishing target with the polishing pad
Data Source
AI summary
Provided is a composition for semiconductor processing including abrasive particles and at least one additive. The composition may exhibit excellent polishing performance by being applied to a process of polishing a semiconductor wafer, may minimize defects in a polishing target surface, may achieve flat polishing without a difference in flatness between a plurality of different layers when used to polish the externally exposed surfaces of the layers, and may be applied to polishing of the surface of a semiconductor wafer having a through silicon via (TSV). Also provided is a method of fabricating a semiconductor device using the composition.