TSV Polymer Liner Structure for Dense Via Isolation and Reliability
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Solution Overview
Problem
As semiconductor devices progress to advanced technology nodes, the increasing density of conductive vias leads to electrical interference, reliability issues, and stress concentration, which affect device performance and yield, particularly in multi-stack structures.
Innovation Solution
A semiconductor device design incorporating a polymer liner between the sidewall of through substrate vias (TSVs) and the substrate, formed using a pulsed etching process, to alleviate electrical interference and improve hybrid bonding reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the distance between two adjacent conductive vias is reduced to increase device density, then device density is improved, but electrical interference increases and device performance decreases
Solution Approach 1:
A polymer liner is introduced as an intermediary material between adjacent through substrate vias (TSVs). This polymer liner acts as a mediator that reduces electrical interference between closely spaced vias, enabling higher device density while maintaining electrical performance. The polymer material provides electrical isolation between neighboring conductive structures.
2Quantity of substance
If the dimensions of through substrate vias are reduced to increase device density, then device density is improved, but stress concentration increases and reliability issues arise
Solution Approach 1:
The polymer liner is formed beforehand in the TSV structure to provide stress relief and mechanical support. This cushioning layer prevents stress concentration in small-diameter vias, maintaining via reliability even as dimensions are reduced to increase device density.
3Reliability
If a polymer liner is formed extending to the top surface of the passivation layer to improve TSV reliability, then via reliability is improved, but hybrid bonding yield decreases
Solution Approach 1:
The polymer liner is selectively positioned with its top surface below the passivation layer surface, creating different functional zones: the polymer provides reliability enhancement for the TSV while the exposed passivation layer surface maintains compatibility for hybrid bonding. This local differentiation resolves the conflict between via reliability and bonding yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The polymer liner reduces electrical interference and stress concentration, enhancing device performance and yield by improving the reliability of TSVs and hybrid bonding.
Implementation Method 1
performing a pulsed etching operation to form a polymer liner in the first recess
Data Source
AI summary
The present disclosure provides a semiconductor device and a manufacturing method of the semiconductor device. The semiconductor device includes: a first substrate, having a front side and a back side opposite to the front side; a first passivation layer over the front side of the first substrate; a second passivation layer over the back side of the first substrate, wherein the second passivation layer has a top surface facing away from the first substrate; a conductive feature disposed in the first passivation layer; a through substrate via penetrating through the second passivation layer and the first substrate; and a polymer liner between a sidewall of the through substrate via and the first substrate.