Through-Silicon Via Structure for Semiconductor Power and Ground Design

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Solution Overview

Problem

The high cost and inefficiency of manufacturing semiconductor devices due to the need for separate chambers and processes for etching silicon substrates and dielectric layers in through-silicon via structures, which increases manufacturing costs and can lead to structural weaknesses like the popcorn effect.

Innovation Solution

A through-silicon via structure where a conductive layer extends from the substrate surface through a dielectric layer to contact the substrate, with a redistribution layer and passivation layers to ensure electrical connectivity and structural integrity, potentially using a single chamber for both etching processes and filling the via with encapsulation material to prevent structural weaknesses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If separate chambers and processes are used for etching silicon substrates and dielectric layers, then etching quality can be maintained, but manufacturing cost increases and efficiency decreases

Engineering Contradiction:
Improveetching qualityVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent combines the etching of silicon substrates and dielectric layers into a single chamber process, merging two separate manufacturing steps into one integrated operation. This reduces the number of chamber transfers and process steps while maintaining etching quality through carefully controlled process parameters and chemistry selection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The etching chamber is designed to perform multiple functions by etching both silicon substrates and dielectric layers using different process configurations and chemistries within the same chamber, making the chamber universal for both tasks and eliminating the need for separate dedicated chambers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If separate chambers and processes are used for etching silicon substrates and dielectric layers, then etching quality can be maintained, but manufacturing cost increases

Engineering Contradiction:
Improveetching qualityVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent combines the etching of silicon substrates and dielectric layers into a single chamber process, merging two separate manufacturing steps into one integrated operation. This reduces the number of chamber transfers and process steps while maintaining etching quality through carefully controlled process parameters and chemistry selection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The etching chamber is designed to perform multiple functions by etching both silicon substrates and dielectric layers using different process configurations and chemistries within the same chamber, making the chamber universal for both tasks and eliminating the need for separate dedicated chambers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If through-silicon via structures are used, then electrical connectivity is improved, but structural weaknesses like popcorn effect may occur

Engineering Contradiction:
Improveelectrical connectivityVSAvoidstructural integrity
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies a stress relief layer or intermediate structure within the via formation process to prevent the popcorn effect before it occurs. This cushioning approach addresses the root cause of delamination by managing stress accumulation during the via etching and filling processes, thereby maintaining structural integrity while achieving electrical connectivity.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent introduces an intermediate layer or material within the via structure that acts as a mediator between the dielectric layer and the via fill material. This intermediary layer prevents direct stress concentration at the interface, eliminating the popcorn effect while preserving the electrical connectivity function of the via.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10600759B2Power and ground design for through-silicon via structure
Publication Date: 2020.03.24 ADVANCED SEMICON ENG INC
  • US10600759B2 patent drawing
  • US10600759B2 patent drawing
  • US10600759B2 patent drawing

AI summary

In one or more embodiments, a semiconductor device includes a substrate, a first dielectric layer and a first conductive layer. The substrate includes a first surface and a second surface opposite the first surface. The first dielectric layer is on the first surface of the substrate. The first conductive layer is on the first surface of the substrate and includes a first portion on the first dielectric layer and a second portion surrounded by the first dielectric layer. The second portion of the first conductive layer extends from the first portion of the first conductive layer through the first dielectric layer to contact the first surface of the substrate.