TSV Via Protective Layer Structure for CMP Damage Reduction

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Solution Overview

Problem

The challenge in semiconductor manufacturing is to prevent damage to through-silicon vias (TSVs) during the chemical-mechanical polishing (CMP) process, which can cause breakage and affect the integrity of the semiconductor device.

Innovation Solution

A via protective layer is introduced, which is deposited on the substrate and overlaps the through-electrode, filling concave portions in the via passivation layer to reduce friction and stress during polishing, thereby minimizing the risk of TSV breakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a through-silicon via (TSV) is formed and exposed during CMP process, then electrical connection through substrate is achieved, but the TSV is susceptible to damage and breakage during polishing

Engineering Contradiction:
ImproveTSV integrityVSAvoidCMP process damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A via protective layer is formed over the via passivation layer before the CMP process to preemptively protect the TSV from polishing damage. The protective layer is deposited in advance and extends beyond the TSV boundaries, ensuring coverage during subsequent polishing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The via protective layer acts as a cushioning layer that absorbs and distributes the mechanical stress and friction during CMP processing. This protective layer prevents direct contact between the polishing pad and the via passivation layer, reducing the risk of TSV breakage.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If via passivation layer is deposited to protect TSV, then TSV is covered, but concave portions form that increase friction and stress during polishing

Engineering Contradiction:
ImproveTSV protectionVSAvoidresistance to polishing stress
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The via protective layer is specifically deposited in concave portions of the via passivation layer where friction and stress are highest during CMP processing. This localized reinforcement provides enhanced protection precisely where it is most needed, addressing the weakness in the via passivation layer structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The via protective layer is formed beforehand to fill and reinforce the concave portions of the via passivation layer before CMP processing begins. This preliminary reinforcement ensures that the via passivation layer has sufficient strength to withstand polishing stresses.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If via protective layer is added to prevent TSV breakage, then TSV integrity is improved, but device structure and manufacturing complexity increase

Engineering Contradiction:
ImproveTSV integrityVSAvoidlayer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The via protective layer serves multiple functions: it protects the TSV from CMP damage, reinforces concave portions of the via passivation layer, and provides a uniform surface for subsequent processing steps. This multi-functionality justifies the additional layer by delivering multiple benefits from a single structural addition.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11978688B2Semiconductor device having via protective layer
Publication Date: 2024.05.07 SAMSUNG ELECTRONICS CO LTD
  • US11978688B2 patent drawing
  • US11978688B2 patent drawing
  • US11978688B2 patent drawing

AI summary

A semiconductor device is disclosed. The semiconductor device includes a via passivation layer disposed on an inactive surface of a substrate, a through-electrode vertically penetrating the substrate and the via passivation layer, a concave portion formed in the top surface of the via passivation layer and disposed adjacent to the through-electrode, and a via protective layer coplanar with the via passivation layer and the through-electrode and to fill the concave portion. In a horizontal cross-sectional view, the via protective layer has a band shape surrounding the through-electrode.