TSV Recess Structure for Stable Back-Side Via Bonding
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Solution Overview
Problem
The TSV packaging technology faces challenges in controlling the depth of metal pads, leading to open circuits if too deep and separation or short-circuits if too shallow, requiring improved stability in back-side via exposure and wafer bonding processes.
Innovation Solution
A semiconductor structure is formed by providing a semiconductor substrate with an oxide layer, etching to create a recess, depositing a metal layer, and filling it with a conductive material, including forming a hole in the metal layer to connect through-silicon via, enhancing bonding stability and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the metal pad depth is increased to ensure connection, then the connection reliability is improved, but the risk of open circuit increases and the manufacturing precision becomes harder to control
Solution Approach 1:
The patent introduces an oxide layer as an intermediary between the metal pad and the through-silicon via. This oxide layer serves as a buffer zone that accommodates depth variations of the metal pad, preventing direct contact issues. The oxide layer can be selectively etched to expose the via at the appropriate depth, thereby decoupling the metal pad depth from the via exposure depth and resolving the contradiction between connection reliability and manufacturing precision.
2Manufacturing precision
If the metal pad depth is decreased to improve manufacturing control, then the manufacturing precision is improved, but the connection reliability deteriorates due to open circuits
Solution Approach 1:
The oxide layer acts as a mediator that allows the metal pad to be formed at a controlled, shallower depth while still ensuring reliable connection to the through-silicon via. The selective etching of the oxide layer reveals the via endpoint, guaranteeing connection reliability independent of the metal pad depth, thus resolving the contradiction.
3Manufacturing precision
If the metal pad is made shallower to avoid short circuits, then the manufacturing precision is improved, but the risk of separation after bonding increases
Solution Approach 1:
The patent applies beforehand cushioning by forming the oxide layer prior to metal pad deposition. This oxide layer serves as a cushion that prevents the metal pad from directly contacting the via wall at excessive depths, avoiding short circuits. During bonding, the oxide layer can be selectively removed to expose the via, ensuring proper contact without the risk of premature separation or short circuits.
4Reliability
If the through-silicon via exposure depth is increased to ensure via connection, then the connection reliability is improved, but the device complexity increases
Solution Approach 1:
The oxide layer serves as an intermediary that simplifies the overall process. Instead of directly controlling via exposure depth through complex etching processes, the oxide layer provides a straightforward mechanism: deposit the oxide, form the metal pad, then selectively etch the oxide to expose the via. This intermediary approach reduces process complexity while maintaining via connection reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves the control over metal pad depth and enhances the bonding process, ensuring reliable connections and reducing the risk of open or short circuits, thereby improving the performance and reliability of semiconductor structures.
Implementation Method 1
forming an oxide layer on a surface of the semiconductor substrate
Implementation Method 2
depositing a metal layer on a surface of the recess
Data Source
AI summary
The present disclosure provides a semiconductor structure, a forming method thereof, and a semiconductor device, and relates to the technical field of semiconductor packaging processes. The method includes: providing a semiconductor substrate; forming an oxide layer on a surface of the semiconductor substrate, and etching the oxide layer to form a recess, where a through-silicon via (TSV) is provided in the semiconductor substrate and the oxide layer, and an upper end of the TSV is connected to the recess; depositing a metal layer on a surface of the recess, and forming an opening in the metal layer on a bottom surface of the recess, where the opening is connected to the TSV; and filling a second conductive material into the recess, and forming a hole in the second conductive material above the opening.


