Strain-Relieved TSV With Recessed Isolation Layer

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Solution Overview

Problem

Through substrate vias (TSVs) filled with materials having a coefficient of thermal expansion mismatch relative to their substrates, such as silicon, induce compressive stress that can disrupt neighboring devices, and conventional solutions like Keep-Out Regions result in circuit layout penalties.

Innovation Solution

A semiconductor die with a through substrate via filled with a conductive material, surrounded by a liner isolation layer that includes a recessed portion filled with a compliant material, such as polyimide, to absorb stress and prevent filler material expansion out of the TSV.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a Keep-Out Region is used to isolate TSV stress, then device reliability is improved, but circuit layout area increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcircuit layout area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The harmful compressive stress is extracted from the substrate by introducing a recessed isolation layer that captures and contains the stress within the TSV structure itself, eliminating the need for external Keep-Out Regions

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

A recessed isolation layer acts as an intermediary structure between the TSV and the substrate, absorbing and relieving the compressive stress generated by CTE mismatch while allowing closer device placement

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If copper filling material is used in TSV, then electrical conductivity is improved, but thermal expansion mismatch causes stress and potential disruption

Engineering Contradiction:
Improveelectrical conductivityVSAvoidcompressive stress
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The harmful compressive stress generated by copper's thermal expansion is converted into a beneficial stress-relief mechanism by designing a recessed isolation layer that allows controlled expansion without disrupting surrounding devices

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The physical state and geometry of the isolation layer are changed by creating a recessed structure, which modifies how stress is distributed and absorbed, allowing copper filling while mitigating its thermal expansion issues

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively relieves strain on neighboring devices by allowing the filler material to expand into a recessed cavity, reducing the risk of disruption and minimizing the circuit layout penalty associated with Keep-Out Regions.

Implementation Method 1

the recessed portion capable of relieving stress from the conductive filler material

Methodology Applied
Scientific EffectElastic deformation: Elasticity

Implementation Method 2

the copper filling material within the TSVs may expand upwardly and out of the TSV

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentEP2820671B1Structure and method for strain-relieved TSV
Publication Date: 2020.06.17 QUALCOMM INC
  • EP2820671B1 patent drawingFigure 1
  • EP2820671B1 patent drawingFigure 2
  • EP2820671B1 patent drawingFigure 3

AI summary

A semiconductor die including strain relief for through substrate vias (TSVs). The semiconductor die includes a semiconductor substrate having an active face. The semiconductor substrate includes conductive layers connected to the active face. The semiconductor die also includes a through substrate via extending only through the substrate. The through substrate via may include a substantially constant diameter through a length of the through substrate via. The through substrate via may be filled with a conductive filler material. The semiconductor die also includes an isolation layer surrounding the through substrate via. The isolation layer may include two portions: a recessed portion near the active face of the substrate capable of relieving stress from the conductive filler material, and a dielectric portion. A composition of the recessed portion may differ from the dielectric portion.