TSV Redundancy Architecture Using Decoder and Encoder
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Solution Overview
Problem
Current TSV redundancy architectures in 3D IC stacks are either cost-ineffective or fail to handle multiple defects in a single row or column, leading to communication losses between dies.
Innovation Solution
A method involving a 2:4 Decoder and 4:2 Encoder is used to redirect signal bits from defective TSVs to a row or column of redundant TSVs, forming an 'L-shaped' pattern and utilizing electronic fuse cells for testing, ensuring signal bit redirection until it reaches a redundant TSV.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 50% TSV redundancy is used with switching box, then fault tolerance is improved, but area overhead increases and cost effectiveness decreases
Solution Approach 1:
The TSV array is segmented into functional units with localized redundancy. Each TSV has dedicated spare TSVs in the same row or column, allowing fault isolation and targeted redirection without requiring global switching infrastructure.
Solution Approach 2:
Redundancy is added in the spatial dimension by creating row and column extensions. When a TSV fails, the signal can be redirected along the row or column dimension to reach a spare TSV, providing fault tolerance without requiring additional vertical stacking layers.
2Reliability
If 100% TSV redundancy is used, then fault tolerance is improved, but cost effectiveness decreases for large TSV arrays
Solution Approach 1:
Instead of uniform 100% redundancy across the entire array, the patent applies redundancy locally at the row and column level. Each TSV has spares in its row or column, providing adequate fault coverage while maintaining cost effectiveness for large arrays.
3Area of stationary object
If shift-right TSV redundancy architecture is used, then area overhead is reduced, but it fails when multiple TSVs fail in a single row
Solution Approach 1:
The patent merges row-wise and column-wise redundancy strategies. A TSV can be redirected along its row to a row-spare or along its column to a column-spare, providing multiple escape paths that handle multiple failures within the same row or column.
4Reliability
If conventional redundancy schemes are used, then some fault coverage is achieved, but adaptability to different design assumptions is poor
Solution Approach 1:
The row-column redundancy architecture provides a universal fault tolerance mechanism that works regardless of the specific defect distribution pattern. It handles isolated failures, clustered failures, row-wise failures, and column-wise failures with the same structural approach, making it adaptable to various design assumptions and defect models.
Data Source
AI summary
A method of redirecting signal bits associated with or corresponding to defective TSVs of a TSV array to a row or a column of redundant TSVs in the TSV array using a 2:4 Decoder and 4:2 Encoder and the resulting device are provided. Embodiments include forming a TSV array between a bottom die and a top die of a 3D IC stack, the TSV array having a row and a column of redundant TSVs; identifying a defective TSV of the TSV array; determining whether to shift a signal bit associated with or corresponding to the defective TSV in a first and/or a second direction towards the row or the column of redundant TSVs; and shifting the signal bit in the first and/or the second direction until the signal bit has been redirected to the row or the column of redundant TSVs.