TSV Etch Stop Control via Release Layer
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Solution Overview
Problem
Current 3D integrated circuit packages face challenges in forming through-silicon vias with high aspect ratios and precise etch stop control, leading to variations in via positions and requiring additional processing steps like via reveal operations.
Innovation Solution
The method involves using a release layer as an etch stop to form through-substrate vias (TSVs) with buried ends, which simplifies the etching process, reduces positional variations, and eliminates the need for via reveal operations, while also enabling the singulation of integrated circuit dies using etched trenches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used to form through-silicon vias, then vias can be formed, but etch stop control is difficult leading to variations in via positions
Solution Approach 1:
An etch stop layer is introduced as an intermediary between the silicon substrate and the underlying layer. This etch stop layer has controlled etch selectivity, allowing the etching process to automatically terminate at a precise depth when encountering the etch stop layer, thereby eliminating variations in via positions without requiring complex control mechanisms.
Solution Approach 2:
The etch stop layer is formed in advance before the via etching process. By pre-positioning this layer with known characteristics, the subsequent etching operation can rely on the etch stop layer to define the via depth and position, simplifying the overall process control while achieving high precision.
2Reliability
If high aspect ratio TSVs are formed, then vertical connectivity is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The etch stop layer serves as a mediator that enables precise control of high aspect ratio via etching. By providing a well-defined termination point with controlled etch selectivity, it allows the formation of deep vias with high aspect ratios while maintaining manufacturing simplicity and reducing process complexity.
3Ease of operation
If via reveal operations are performed, then via access is achieved, but additional processing steps and manufacturing cost are required
Solution Approach 1:
The need for separate via reveal operations is eliminated by designing the etch stop layer to be automatically removed or exposed through the main via etching process itself. The etch stop layer's controlled removal is extracted and integrated into the primary etching step, eliminating the need for additional reveal processing steps and improving manufacturing efficiency.
4Quantity of substance
If densely packed TSVs are formed, then packaging density is improved, but etch control and manufacturing precision become more difficult
Solution Approach 1:
The etch stop layer acts as a universal intermediary that provides consistent etch termination across densely packed via patterns. Its uniform properties and controlled selectivity ensure that each via etches to the correct depth with high precision, even when vias are densely packed, thereby enabling high packaging density without sacrificing etch control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the efficient formation of densely packed, high-aspect-ratio TSVs with reduced manufacturing costs and improved die singulation, enhancing the performance and packaging density of 3D integrated circuit assemblies.
Implementation Method 1
etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop
Implementation Method 2
etching through-substrate via (TSV) openings through the integrated circuit substrate
Implementation Method 3
TSVs may be formed by introducing one or more conductive materials into the TSV openings
Data Source
AI summary
Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.