TSV Depth Determination via Resistance Measurement
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Solution Overview
Problem
Conventional inline electrical testing of through-silicon-vias (TSVs) in semiconductor chips is not possible until after silicon thinning and backside metal deposition, leading to delayed detection of defects, which negatively impacts the throughput, efficiency, and cost of the semiconductor fabrication process.
Innovation Solution
A test structure is implemented that allows determination of TSV depth before grinding and backside metal deposition by using a channel with electrical contacts connected to the TSV, where the resistance of the channel is used to determine the TSV depth, potentially including isolation trenches to enhance measurement sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional inline electrical testing is performed only after silicon thinning and backside metal deposition, then the TSV can be electrically tested, but the detection of defective TSVs is delayed, negatively impacting throughput and efficiency
Solution Approach 1:
The patent creates a preliminary test structure with electrical contacts formed before silicon thinning and backside metal deposition. This allows TSV depth and continuity to be tested earlier in the fabrication process using resistance measurements, enabling defect detection before the final processing steps without compromising the integrity of the main TSV structure
Solution Approach 2:
The patent segments the TSV testing function by creating a separate test structure that includes a test TSV, test contacts, and isolation trenches. This segmented approach allows independent testing of TSV depth and continuity without requiring the complete fabrication process to be finished, thereby enabling earlier detection while maintaining production flow
2Productivity
If TSV depth is not etched deeply enough, then the fabrication process is faster, but the TSV may be defective and non-functional
Solution Approach 1:
The patent implements a feedback mechanism by measuring the resistance of the test channel after TSV formation but before final processing. This resistance measurement provides feedback on whether the TSV depth is sufficient for proper functionality, allowing real-time verification and adjustment of etching parameters to ensure adequate TSV depth while maintaining fabrication efficiency
3Measurement precision
If a test structure with isolation trenches is used to enhance measurement sensitivity, then the measurement precision improves, but the device complexity increases
Solution Approach 1:
The patent applies local quality by creating isolation trenches specifically in the test structure region to enhance measurement sensitivity for TSV depth determination. The isolation trenches are localized to the test area rather than the entire chip, providing improved measurement precision through controlled electrical isolation while minimizing the overall increase in device complexity by confining the additional structural elements to a localized test region
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables early detection of defective TSVs, improving semiconductor chip yield by allowing corrective actions during the fabrication process, thus enhancing the efficiency and reducing costs.
Implementation Method 1
a depth of the first TSV is determined based on a resistance of the first channel
Data Source
AI summary
A test structure for a through-silicon-via (TSV) in a semiconductor chip includes a first contact, the first contact being electrically connected to a first TSV; and a second contact, wherein the first contact, second contact, and the first TSV form a first channel, and a depth of the first TSV is determined based on a resistance of the first channel.