TSV Reveal Nitride Etch for Consistent Step Height Alignment
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Solution Overview
Problem
The polishing process for through silicon via (TSV) reveal in multi-die module architectures is challenging due to substrate warpage and non-uniformities, leading to difficulties in achieving a uniform step height, which affects alignment and electrical connections in high volume manufacturing environments.
Innovation Solution
An etching process is used instead of polishing to uniformly remove the insulating layer, maintaining a consistent step height and enabling accurate alignment and electrical coupling between TSVs and overlying bumps, even in the presence of substrate warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a polishing process is used to expose the TSV top surface, then the insulating layer can be removed to enable electrical connection, but substrate warpage and non-uniformities cause over-polishing or under-polishing, making it difficult to maintain a consistent step height for alignment
Solution Approach 1:
The patent changes the fundamental process parameter from mechanical polishing to chemical etching. This parameter change enables uniform removal of the insulating layer through controlled chemical reactions, achieving consistent step height (e.g., 0.5-2.0 micrometers) across the substrate without being affected by substrate warpage or requiring complex polishing control systems
Solution Approach 2:
The patent replaces the mechanical polishing system with a chemical etching system. Instead of using mechanical abrasion that is sensitive to substrate non-uniformities, the invention uses chemical etchants that uniformly react with the insulating layer material, eliminating the need for complex mechanical control and reducing sensitivity to substrate warpage
2Productivity
If polishing is used to remove the insulating layer, then electrical connection can be established, but the process is difficult to implement in high volume manufacturing due to substrate warpage and non-uniformities
Solution Approach 1:
The patent changes the process from mechanical polishing to chemical etching, which provides more reliable and consistent results. The chemical etching process achieves uniform step height control (0.5-2.0 micrometers) that is not affected by substrate warpage, ensuring reliable alignment accuracy even in high volume manufacturing environments where substrate non-uniformities are prevalent
3Ease of operation
If over-polishing occurs, then the insulating layer is completely removed, but the step height difference becomes zero, making it difficult to determine alignment for subsequent manufacturing operations
Solution Approach 1:
The chemical etching process incorporates feedback control through timed etching cycles and real-time monitoring of etch rate and uniformity. This feedback mechanism prevents over-etching by stopping the process before the insulating layer is completely removed, maintaining the necessary step height difference for alignment determination while ensuring complete TSV exposure
4Manufacturing precision
If under-polishing occurs, then the insulating layer remains over the TSV top surface, but electrical connection cannot be made between the TSV and overlying bump
Solution Approach 1:
The chemical etching process uses feedback control to monitor etch progress and ensure complete removal of the insulating layer from the TSV top surface. By controlling etch time, temperature, and chemical concentration, the process reliably exposes the TSV while maintaining uniform step height, ensuring electrical connection reliability without sacrificing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces the need for manual intervention, and ensures consistent alignment and electrical connections, improving throughput and reducing costs in high volume manufacturing.
Implementation Method 1
An etching process is used instead of polishing to uniformly remove the insulating layer
Data Source
AI summary
Embodiments disclosed herein include an interposer. In an embodiment, the interposer comprises a substrate with a first surface and a second surface opposite from the first surface. In an embodiment, a via is provided through the substrate, where a portion of the via extends past the second surface. In an embodiment, a first layer is over the substrate, where the first layer is an electrically insulating material. In an embodiment, a second layer is over the first layer and over the portion of the via that extends past the second surface.