Through-Substrate Via Segmentation for GaN Transistor Source Connection
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Solution Overview
Problem
Current methods for connecting the source electrode of Group III nitride-based transistors to the rear surface of the substrate in lateral transistor devices are not optimal, leading to inefficiencies in current conduction and power efficiency.
Innovation Solution
A method involving the formation of a blind via on the substrate's front surface, where a conductive material is inserted using distinct deposition parameters to create a conductive plug and a conductive liner layer, allowing for improved electrical coupling between the source electrode and the rear surface through a conductive through-substrate via.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional through-substrate via methods are used to connect the source electrode to the rear surface, then electrical connection is established, but wafer bowing occurs and solder intrusion is possible during die attach
Solution Approach 1:
The conductive fill is segmented into two distinct portions: a first conductive portion that fills a first portion of the opening, and a second conductive portion that fills a second portion of the opening. This segmentation allows each portion to serve different functions - the first portion provides robust electrical connection at the base, while the second portion provides lateral coverage to prevent solder intrusion, thereby resolving the contradiction between reliable electrical connection and prevention of harmful factors
Solution Approach 2:
Different regions of the conductive fill are given different properties and configurations. The first conductive portion has vertical orientation for optimal electrical conduction, while the second conductive portion has lateral extension for mechanical support and solder prevention. This local differentiation of quality allows the same structure to simultaneously achieve reliable electrical connection and prevent wafer bowing and solder intrusion
2Reliability
If the opening is completely filled with conductive material, then electrical conduction is maximized, but the structure becomes vulnerable to solder intrusion and wafer bowing
Solution Approach 1:
Instead of completely filling the opening with conductive material, the invention uses partial filling with two distinct conductive portions. The first conductive portion fills only a first portion of the opening to provide necessary electrical conduction, while the second conductive portion fills a second portion to provide lateral support and prevent solder intrusion. This partial filling approach avoids the harmful effects of complete filling while maintaining adequate electrical performance
Solution Approach 2:
The second conductive portion acts as an intermediary element between the first conductive portion and the surrounding structure. It provides lateral support and creates a barrier that prevents solder intrusion, while also maintaining electrical continuity. This intermediary structure resolves the contradiction by adding protective functionality without compromising electrical conduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electrical connection, reducing wafer bowing and improving thermal performance, while preventing solder intrusion during die attach, thus increasing the efficiency and reliability of the transistor's current conduction.
Implementation Method 1
forming a first conductive layer in the base of the blind via to a depth of 10% to 70% of a total depth of the blind via, forming a conductive plug
Implementation Method 2
forming a second conductive layer on the first conductive layer in a second portion of the opening using second deposition parameters including a second electrochemical processing bath including a second chemical additive system that is different from the first chemical additional system such that the second conductive layer lines the sidewalls of said opening (140)
Data Source
Figure 1~2b
Figure 3a~3b
Figure 4a
AI summary
A Group III nitride semiconductor device comprising a back-side connected source electrode (79, 87) comprising a Through-Substrate Via (TSV) (91, 92). In an embodiment, the method includes forming an opening in the front surface of the substrate, inserting conductive material (91, 92) into the opening, and coupling the source electrode (79) of the Group III nitride-based transistor on the top surface to the electode (87) on the rear surface of the substrate with the conductive material. The conductive material may comprise a conductive line (92) and a conductive plug (91).