Through-Silicon Via Sidewall Silicon Patterns for Short Circuit Prevention
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Solution Overview
Problem
Semiconductor chip stacking using through-silicon vias often results in electrical short circuits due to melted junction metals flowing onto unwanted portions of the chips during the reflow process, leading to decreased manufacturing yield and processing difficulties in applying insulation.
Innovation Solution
Incorporating silicon patterns on the sidewalls of through-silicon vias, which are formed using the same material as the semiconductor chip body and are electrically isolated, to redirect the flow of melted junction metals and prevent short circuits, while allowing for increased junction metal usage for improved electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If junction metals are used to electrically connect stacked semiconductor chips, then electrical connections are achieved, but melted junction metals flow onto unwanted portions causing electrical short circuits
Solution Approach 1:
A silicon oxide layer is introduced as an intermediary substance between the junction metal and the semiconductor chip surface. This intermediate layer prevents direct contact between the melted junction metal and the chip, thereby blocking the harmful effect of electrical short circuits while maintaining the electrical connection function through the through-silicon via structure
Solution Approach 2:
The silicon oxide layer is formed in advance on the lower surface of the upper semiconductor chip before the reflow process. This preliminary protective layer counteracts the potential harmful effect of melted junction metal flowing onto the chip surface, preventing electrical short circuits before they can occur
2Reliability
If insulation material is applied to the lower surface of the semiconductor chip to prevent short circuits, then short circuit prevention is achieved, but processing complexity and cost increase
Solution Approach 1:
The insulation function is merged with the existing through-silicon via structure by forming a silicon oxide layer that is already present on the chip surface. This combines the via formation process with the insulation provision, eliminating the need for separate insulation material application steps and reducing processing complexity
Solution Approach 2:
The silicon oxide layer serves dual purposes: it acts as both the insulation layer preventing short circuits and as part of the through-silicon via structure itself. The existing oxide layer on the chip surface is utilized for insulation without requiring additional external insulation materials or complex application processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The silicon patterns effectively prevent electrical short circuits by redirecting the flow of melted junction metals, enhancing manufacturing yield and reliability of electrical connections in stacked semiconductor chips.
Implementation Method 1
the silicon patterns effectively prevent electrical short circuits by redirecting the flow of melted junction metals
Implementation Method 2
The exposed portions of the through-silicon vias of the upper semiconductor chip and the upper pads of the lower semiconductor chip are electrically connected to each other by melting the junction metals interposed therebetween through a reflow process
Data Source
AI summary
A semiconductor chip includes a semiconductor chip body, a through-silicon via and a silicon pattern. The semiconductor chip body has a first surface and a second surface facing away from the first surface. The through-silicon via is formed to pass through the semiconductor chip body and has a metal layer and an insulation layer which protrude from the second surface. The silicon pattern is formed on a sidewall of the protruding through-silicon via.