Through Silicon Vias for Signal Power Isolation in Stacked Memory
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Solution Overview
Problem
Current semiconductor technologies face challenges in efficiently connecting and powering memory chips stacked over logic chips, particularly in ensuring high-speed signal transmission and independent power delivery without noise interference.
Innovation Solution
The implementation of through silicon vias (TSVs) that connect the memory control circuit to the memory chip for signal transmission and provide a separate, insulated path for power delivery, allowing for independent signal and power pathways between the logic and memory chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If through vias are used to connect memory control circuit to memory chip for signal transmission, then signal transmission speed is improved, but noise interference from power signals may affect data signals
Solution Approach 1:
The patent divides the through via into two separate types: signal through vias and power through vias. Signal through vias transmit data signals between the memory control circuit and memory chip, while power through vias deliver power signals. This segmentation prevents noise from power signals from interfering with data signals, while maintaining high-speed signal transmission capability.
Solution Approach 2:
The patent extracts the power delivery function from the signal transmission path by creating separate power through vias that are electrically insulated from the memory control circuit. This removes the harmful power signals from the signal transmission environment, eliminating noise interference while preserving fast signal transmission.
2Object-affected harmful factors
If separate through vias are used for signal and power delivery, then noise interference is reduced, but device complexity increases
Solution Approach 1:
Both signal through vias and power through vias use the same basic TSV structure and formation process. The via holes are created through the substrate using identical drilling and filling techniques. This multi-functional approach allows separate signal and power paths without significantly increasing manufacturing complexity, as the same fabrication processes serve both functions.
Data Source
AI summary
A semiconductor apparatus includes a base substrate and a logic chip disposed on the base substrate. The logic chip includes a memory control circuit, a first through silicon via, and a second through silicon via. The memory control circuit is disposed on a first surface of a substrate of the logic chip, and a memory chip is disposed on a second surface of the substrate of the logic chip. The first through silicon via electrically connects the memory control circuit and the memory chip, the second through silicon via is electrically connected to the memory chip and is configured to transmit power for the memory chip, the second through silicon via is electrically insulated from the logic chip, and the first surface of the substrate of the logic chip faces the base substrate.