TSV Protective Sleeve Structure for High-k Dielectric Integrity
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Solution Overview
Problem
The aggressive etching process used to form through-substrate vias (TSVs) in integrated chips can damage high-k dielectric materials, leading to reliability issues and increased resistive-capacitive (RC) coupling, which affects the performance of modern integrated chips with multiple substrates.
Innovation Solution
A protective sleeve is formed along the outer sidewalls of the TSV to separate it from adjacent dielectric layers, confining the etch and preventing damage to the high-k dielectric materials, allowing the TSV to extend through the substrate to thicker metal wires while maintaining the integrity of the dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If aggressive etching process is used to form TSV, then TSV can be formed through substrate to contact thicker metal wires, but high-k dielectric materials are damaged leading to reliability issues and increased RC coupling
Solution Approach 1:
A protective sleeve structure is introduced as an intermediary element between the aggressive etching process and the high-k dielectric materials. The sleeve acts as a mediator that allows the etch to proceed through the substrate while preventing direct contact with and damage to the dielectric layers, thus resolving the contradiction between achieving precise TSV formation and maintaining dielectric integrity
Solution Approach 2:
The protective sleeve is formed in advance before the aggressive etching process. This preliminary protective action creates a barrier that prevents the harmful etching effects from reaching the high-k dielectric materials, allowing the subsequent etching step to proceed without compromising dielectric layer integrity
2Reliability
If TSV extends to thicker metal wires, then contact resistance is reduced, but etching process damages dielectric materials increasing RC coupling
Solution Approach 1:
The protective sleeve serves as an intermediary that enables the TSV to reach thicker metal wires for lower contact resistance while simultaneously protecting the dielectric materials from etching damage that would increase RC coupling. The sleeve allows both benefits to coexist by decoupling the etching process from the dielectric layers
3Ease of manufacture
If aggressive etching is used to form TSV, then manufacturing process is simplified, but dielectric material damage increases leading to reliability issues
Solution Approach 1:
The manufacturing process is segmented into distinct steps: first forming the protective sleeve structure, then performing the aggressive etching to create the TSV. This segmentation allows the use of aggressive etching chemistry for simplified TSV formation while the pre-formed sleeve structure ensures dielectric protection, thus maintaining both ease of manufacture and manufacturing reliability
Data Source
AI summary
Some embodiments relate to a semiconductor structure including a semiconductor substrate, and n interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a dielectric structure and a plurality of metal lines that are stacked over one another in the dielectric structure. A through substrate via (TSV) extends through the semiconductor substrate to contact a metal line of the plurality of metal lines. A protective sleeve is disposed along outer sidewalls of the TSV and separates the outer sidewalls of the TSV from the dielectric structure of the interconnect structure.