TSV Silicon Oxide Stack for Crack-Resistant Stress Gradient

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Solution Overview

Problem

The stress difference between the conductive material in the TSV and the surrounding material layer is large, leading to cracks or delamination in semiconductor products.

Innovation Solution

A TSV structure is designed with a silicon oxide stack that has a controlled gradient of oxygen atom concentration and compressive stress, reducing the stress difference by varying the oxygen atom concentration from the diffusion block layer to the semiconductor substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional TSV structure with uniform silicon oxide liner is used, then the manufacturing process is simple, but large stress difference occurs between the copper layer and surrounding material causing cracks or delamination

Engineering Contradiction:
Improvecrack resistanceVSAvoidsilicon oxide stack structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a silicon oxide stack with non-uniform oxygen atom concentration distribution. The oxygen atom concentration is specifically designed to be higher near the copper layer and lower near the semiconductor substrate, creating localized stress characteristics that match the copper layer's stress state and prevent cracks

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the physical parameter of oxygen atom concentration in the silicon oxide stack to control stress distribution. By adjusting the oxygen atom concentration gradient through process parameters (such as deposition conditions), the stress difference between copper and surrounding materials is reduced, preventing delamination and cracks

Inventive Principle:
Principle #35Parameter changes

2Stress or pressure

If the silicon oxide liner has high oxygen atom concentration throughout, then compressive stress is increased to counteract copper tensile stress, but this creates excessive stress near the semiconductor substrate causing interface defects

Engineering Contradiction:
Improvecompressive stress in silicon oxideVSAvoidinterface integrity
Core Design Contradiction:
Stress or pressureVSReliability

Solution Approach 1:

The patent applies local quality by creating different oxygen atom concentrations at different positions within the silicon oxide stack. The region near the copper layer has high oxygen concentration to provide compressive stress, while the region near the semiconductor substrate has lower oxygen concentration to avoid excessive stress and interface defects

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The silicon oxide liner is segmented into a stacked structure with multiple regions having different oxygen atom concentrations. This segmentation allows independent optimization of stress characteristics in different zones, with the first region providing compressive stress and the second region providing stress relief

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively minimizes cracks and delamination by adjusting the stress gradient, enhancing the reliability and integrity of the TSV structure.

Implementation Method 1

a concentration of oxygen atoms in the silicon oxide stack decreases along a direction, and the direction points from the diffusion block layer toward the semiconductor substrate

Methodology Applied
Scientific EffectStress gradient:

Implementation Method 2

The stress difference between the conductive material in the TSV and the surrounding material layer is large, so cracks or delamination often occur

Methodology Applied
Scientific EffectCompressive stress:

Data Source

PatentUS20250329613A1TSV structure and fabricating method of the same
Publication Date: 2025.10.23 UNITED MICROELECTRONICS CORP
  • US20250329613A1 patent drawing
  • US20250329613A1 patent drawing
  • US20250329613A1 patent drawing

AI summary

A through silicon via structure includes a semiconductor substrate. A via hole penetrates the semiconductor substrate. A copper layer is disposed in the via hole. A diffusion block layer is disposed in the via hole, wherein the diffusion block layer surrounds and contacts the copper layer. A silicon oxide stack is disposed in the via hole, wherein the silicon oxide stack surrounds and contacts the diffusion block layer and the silicon oxide stack contacts the semiconductor substrate. The concentration of oxygen atoms in the silicon oxide stack decreases along a direction which is from the diffusion block layer toward the semiconductor substrate.