Through Silicon Via Switching in Stacked Semiconductor Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In stacked semiconductor devices, the requirement for nonvolatile through silicon via switching information to prevent chip defects leads to increased chip area due to the need for storage circuits in each semiconductor chip, which is a common issue across multiple stacked semiconductor devices.

Innovation Solution

A semiconductor device configuration where the first semiconductor chip stores and transfers through silicon via switching information to the second semiconductor chip, eliminating the need for nonvolatile storage circuits in the second chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through silicon via switching information is stored in nonvolatile manner in each semiconductor chip, then reliability is improved, but chip area increases

Engineering Contradiction:
Improvechip reliabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the nonvolatile storage function for switching information from individual chips and relocates it to a separate memory device. The switching information is stored externally and supplied to chips as needed, eliminating the need for on-chip nonvolatile storage circuits and reducing chip area while maintaining reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a separate memory device as an intermediary to store and manage switching information. This memory device acts as a mediator between the control unit and the semiconductor chips, providing switching information on demand without requiring permanent storage on each chip.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If auxiliary through silicon vias are provided to prevent chip defects, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvechip reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic switching of through silicon vias based on real-time defect detection. When a via is detected as defective, the system dynamically reroutes signals through alternative vias using switching circuits, allowing the system to adapt to failures without requiring permanent redundant pathways for all vias.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of through silicon vias dynamically. By monitoring via status and switching between operational and standby vias, the system alters which vias are active, effectively managing defects without permanently complicating the device structure with all possible redundant pathways always engaged.

Inventive Principle:
Principle #35Parameter changes

3Area of stationary object

If through silicon via switching information is transferred from first chip to second chip, then chip area of second chip is reduced, but interchip communication requirements increase

Engineering Contradiction:
Improvechip areaVSAvoidinterchip communication complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent merges the switching information storage and communication functions into a separate memory device that serves all chips. Instead of point-to-point information transfer between chips, the memory device consolidates the switching information distribution, reducing interchip communication complexity while maintaining area benefits.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8310382B2Semiconductor device having plural semiconductor chips laminated to each other
Publication Date: 2012.11.13 LONGITUDE LICENSING LTD
  • US8310382B2 patent drawing
  • US8310382B2 patent drawing
  • US8310382B2 patent drawing

AI summary

In a stacked semiconductor device in which a plurality of through silicon vias used for data transfer are shared among a plurality of semiconductor chips, a first semiconductor chip included in the semiconductor chips holds through silicon via switching information for specifying a through silicon via among the through silicon vias to be used for data transfer, and transfers the through silicon via switching information to a second semiconductor chip included in the semiconductor chips. According to the present invention, because the through silicon via switching information is transferred from the first semiconductor chip to the second semiconductor chip, a circuit for storing the through silicon via switching information in a nonvolatile manner is not required in the second semiconductor chip. With this arrangement, a chip area of the second semiconductor chip can be reduced.