Pre-Bonding TSV Testing via Charge-Sharing

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Solution Overview

Problem

Current 3D IC testing methods for through-silicon-via (TSV) are limited as they cannot be performed before bonding, making it difficult to diagnose individual TSV failures, and existing tests are not efficient for high-density TSVs, leading to compound yield loss and high failure rates.

Innovation Solution

A method involving charging a TSV to a predetermined voltage level, performing charge-sharing with a capacitance device, and determining TSV functionality based on voltage levels within a specific range, allowing for individual TSV testing before bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If current 3D IC testing methods are used for TSV, then testing can be performed after bonding, but individual TSV failure diagnosis becomes difficult and yield loss increases

Engineering Contradiction:
ImproveTSV testing capabilityVSAvoidyield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by enabling TSV testing to be performed before the bonding process. Test circuits are integrated into the TSV structure during fabrication, allowing individual TSV functionality to be verified prior to stacking. This pre-bonding testing capability identifies faulty TSVs early, preventing them from being stacked and causing yield loss, while maintaining the ability to diagnose individual TSV failures.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If TSV density is increased to achieve higher interconnection density, then better performance is achieved, but testing efficiency decreases and failure rates increase

Engineering Contradiction:
ImproveTSV interconnection densityVSAvoidtesting efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent merges the TSV interconnection structure with test circuit functionality. By integrating test circuits directly into the TSV fabrication process and using the TSV structure itself for testing purposes, the design achieves high interconnection density without sacrificing testing efficiency. The same TSV structure serves both interconnection and testing functions, allowing efficient testing even at high densities of 10^4/mm².

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If pre-bonding TSV testing is enabled, then yield loss is reduced, but test circuit complexity increases

Engineering Contradiction:
ImproveyieldVSAvoidtest circuit
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing test circuits that serve multiple functions: they can test individual TSVs, perform pre-bonding verification, and work with high-density TSV configurations. The test circuit is integrated into the standard TSV fabrication process rather than being an add-on, allowing it to handle various testing scenarios without requiring separate complex test structures for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient pre-bonding testing of TSVs, reducing yield loss and failure rates by allowing for the identification of faulty TSVs before stacking, thereby improving the overall yield and reducing implementation costs.

Implementation Method 1

charging a capacitance device to a second predetermined voltage level

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

performing charge-sharing between the through-silicon-via and the capacitance device

Methodology Applied
Scientific EffectCharge-sharing: Conduction (electrical)

Data Source

PatentUS8937486B2Method for testing through-silicon-via
Publication Date: 2015.01.20 NATIONAL TSING HUA UNIVERSITY
  • US8937486B2 patent drawing
  • US8937486B2 patent drawing
  • US8937486B2 patent drawing

AI summary

A method for testing a TSV comprises charging a through-silicon-via under test to a first predetermined voltage level charging a capacitance device to a second predetermined voltage level; performing charge-sharing between the through-silicon-via and the capacitance device; and determining that the through-silicon-via under test is not faulty if the voltage level of the through-silicon-via after the charge-sharing step is within a predetermined range.