TSV Test Circuit for Simultaneous Fault Detection
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Solution Overview
Problem
Current test structures for three-dimensional integrated circuits can only detect open-circuit faults in through-silicon vias (TSVs) and require sequential testing for both open-circuit and short-circuit faults, leading to increased test time and cost as the number of TSVs in a stacked structure grows.
Innovation Solution
A circuit comprising a first comparator for short-circuit fault detection, a second comparator for open-circuit fault detection, and a discriminator using an XOR gate to determine TSV fault types, along with a selector for mode selection between test and debugging modes, allowing simultaneous detection of resistive open-circuit and short-circuit faults.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a typical test structure with a comparator and flip-flop is used, then open-circuit faults can be detected, but short-circuit faults cannot be detected and test time increases proportionally to twice the number of TSVs
Solution Approach 1:
The patent combines open-circuit fault detection and short-circuit fault detection into a single integrated test structure. By adding a second comparator and integrating both detection functions into one test circuit, the system can simultaneously detect both fault types without requiring separate sequential testing processes, thereby reducing test time while maintaining comprehensive fault detection capability
Solution Approach 2:
The test structure is designed to perform multiple functions: it can detect both open-circuit faults and short-circuit faults, analyze TSV characteristics, and provide debug information. This multi-functional design eliminates the need for separate test structures for different fault types, reducing overall test time and improving efficiency
2Reliability
If sequential testing for open-circuit and short-circuit faults is performed, then both fault types can be detected, but test cost increases due to increased test time
Solution Approach 1:
The patent merges sequential testing operations into a single simultaneous testing process by integrating multiple detection functions into one test structure. This consolidation reduces the total number of test operations required, thereby reducing test cost while maintaining comprehensive fault detection
Solution Approach 2:
The test structure is designed as a universal testing system that handles both open-circuit and short-circuit fault detection, TSV characteristic analysis, and debugging functions within a single integrated circuit. This multi-functionality reduces the need for multiple separate test systems, thereby reducing overall test cost
3Loss of information
If TSV characteristics are analyzed and digitized, then comprehensive TSV information is obtained, but test complexity increases
Solution Approach 1:
The test structure is designed to simultaneously perform fault detection and TSV characteristic analysis functions. By integrating these functions into a single unified system rather than requiring separate structures, the patent reduces overall test structure complexity while maintaining comprehensive information gathering capabilities
Solution Approach 2:
The test structure automatically performs TSV characteristic analysis and digitization as part of its normal operation. The system self-services by extracting and analyzing TSV characteristics during the same testing process used for fault detection, eliminating the need for separate analysis equipment and reducing overall system complexity
Data Source
AI summary
Disclosed are a circuit for testing and analyzing a through-silicon via (TSV) and a method of testing the same. The circuit according to the present disclosure is capable of measuring a voltage applied to a first comparator after passing through a TSV and subsequently determining whether the TSV has a short-circuit fault, measuring the voltage applied to a second comparator after passing through the TSV and subsequently determining whether the TSV has an open-circuit fault, and determining whether the TSV is faulty based on an output from each of the first and second comparators.