TSV Tester for Stacked Semiconductor Signal Integrity
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Solution Overview
Problem
Existing semiconductor technologies face challenges in efficiently identifying and utilizing normal through-silicon vias (TSVs) for signal transmission in stacked semiconductor chips, as abnormal TSVs can form during fabrication, leading to signal integrity issues.
Innovation Solution
A semiconductor apparatus and method that includes a TSV tester to assess the state of each TSV by comparing signal types of test input and output signals, selecting only TSVs with normal signal transmission states for use and optionally switching to auxiliary TSVs when necessary, ensuring reliable signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If TSV technology is used to stack memory chips for high integration, then chip capacity and integration are improved, but abnormal TSVs may form during fabrication causing signal integrity issues
Solution Approach 1:
The patent applies preliminary action by testing TSV signal transmission states before final chip assembly and operation. The TSV tester evaluates each TSV's functionality in advance, identifying abnormal TSVs before they cause signal integrity issues in the stacked memory system, allowing proactive selection of normal TSVs for signal transmission.
Solution Approach 2:
The patent implements feedback by using the TSV tester to evaluate signal transmission states and provide information about TSV functionality. This feedback mechanism allows the system to identify abnormal TSVs and adjust signal routing to use only normal TSVs, thereby maintaining signal integrity in the high-capacity stacked memory system.
2Reliability
If all TSVs are tested to identify normal ones for signal transmission, then signal integrity is improved, but testing time and complexity increase
Solution Approach 1:
The patent applies segmentation by dividing the TSV testing process into individual, independent tests for each TSV. The TSV tester can evaluate multiple TSVs separately and efficiently, allowing parallel or sequential testing without requiring complex simultaneous evaluation, thereby reducing overall testing time while maintaining comprehensive coverage.
Solution Approach 2:
The patent implements self-service by enabling the TSV tester to automatically evaluate TSV signal transmission states without requiring manual intervention. The testing process is automated, with the system itself performing the evaluation and identification of normal versus abnormal TSVs, significantly reducing testing time and operational complexity.
3Device complexity
If abnormal TSVs are used for signal transmission, then device complexity is reduced, but signal transmission reliability deteriorates
Solution Approach 1:
The patent applies the taking out principle by extracting and identifying abnormal TSVs from the group of all TSVs through testing. The TSV tester separates normal TSVs from abnormal ones, allowing the system to use only the extracted normal TSVs for signal transmission, thereby ensuring reliability without requiring complex mitigation strategies for abnormal TSVs.
Data Source
AI summary
A semiconductor apparatus includes two or more semiconductor chips and a tester. The two or more semiconductor chips are electrically connected through one or more through-silicon vias (TSVs). The tester is on at least one of the two or more semiconductor chips and tests the state of at least one TSV based on an output signal of the TSV. The TSV is selected as a signal transmission TSV based on the state of the TSV.