TSV Trench Dielectric Shielding for Leakage-Safe High-I/O Packaging
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Solution Overview
Problem
The challenge in advanced semiconductor packaging is the difficulty in forming effective dielectric shielding layers within through-vias due to limitations in depositing dielectric materials, leading to increased leakage current and reduced performance as circuit densities and via dimensions decrease.
Innovation Solution
The method involves forming a trench in a silicon substrate, filling it with a dielectric material, and then exposing and plating a conductive material through the trench, while grinding or polishing to ensure the dielectric and conductive materials are exposed on both sides, allowing for high-thickness dielectric shielding while maintaining low aspect ratios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dielectric material is deposited within vias by CVD or ALD, then dielectric shielding layers are formed, but the thickness is reduced due to deposition limitations
Solution Approach 1:
Instead of depositing dielectric material inside the via (conventional approach), the patent inverts the process by first forming a trench around the via, then filling the trench with dielectric material to create a shielding layer. This external deposition approach overcomes the limitations of internal via deposition and enables formation of thicker, more effective dielectric shielding layers.
2Productivity
If via dimensions are decreased to increase circuit density, then integration density improves, but dielectric shielding layer thickness is reduced
Solution Approach 1:
The patent transitions from one-dimensional internal via filling to a two-dimensional approach by forming a trench around the via and filling it with dielectric material. This dimensional shift enables effective dielectric shielding even when via dimensions are reduced for higher circuit density, as the shielding layer is formed in the lateral dimension rather than being constrained by the via's internal volume.
3Ease of manufacture
If dielectric shielding layer thickness is reduced, then deposition is easier, but leakage current increases
Solution Approach 1:
The patent performs preliminary action by forming the dielectric shielding layer through trench filling before via plating. This ensures that a sufficient thickness of dielectric material is established in advance to prevent leakage current, while the trench structure makes the subsequent via plating process feasible. The preliminary formation of the shielding structure resolves the conflict between deposition ease and leakage prevention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of high-thickness dielectric shielding layers within through-vias, reducing leakage current and enhancing the performance of semiconductor devices by maintaining low aspect ratios and improving packaging architectures for advanced integrated semiconductor devices.
Implementation Method 1
laminating a dielectric film on the first side of the silicon substrate to cause a dielectric material of the dielectric film to fill the trench
Implementation Method 2
plating a conductive material on the inner surface of the dielectric material
Implementation Method 3
grinding or polishing the silicon substrate on the first side and a second side opposite the first side. The grinding or polishing exposes the conductive material and the dielectric material on the first side and the second side
Data Source
AI summary
The present disclosure relates to through-via structures with dielectric shielding of interconnections for advanced wafer level semiconductor packaging. The methods described herein enable the formation of high thickness dielectric shielding layers within low aspect ratio through-via structures, thus facilitating thin and small-form-factor package structures having high I/O density with improved bandwidth and power.


