Through-Substrate Via Structure for Void-Reduced Electroplating
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Solution Overview
Problem
As integrated chip components shrink in size, forming through-substrate vias (TSVs) with smaller openings becomes challenging, leading to voids in the TSVs due to difficulties in electroplating, which increases resistance and decreases the effectiveness of the TSVs.
Innovation Solution
A method is presented that involves performing a first etching process to form a wide opening through the semiconductor substrate, lining the sidewalls with a dielectric layer, and then using a blocking layer and a temporary blocking layer to confine the etchant during a second etching process, resulting in a narrower opening that allows for effective electroplating and reduced voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the opening size is reduced to shrink chip components, then the chip size is reduced, but voids form in the TSVs due to electroplating difficulties, increasing resistance and decreasing effectiveness
Solution Approach 1:
The patent divides the TSV formation process into multiple stages: first forming a wide opening, then using a mandrel structure to define a narrower final opening. This segmentation allows the electroplating process to occur in a wider space initially, then be confined to the smaller target area, ensuring complete metal deposition without voids while achieving the desired small chip size.
Solution Approach 2:
The patent introduces a mandrel structure as an intermediary element during the TSV formation process. The mandrel serves as a temporary structure that defines the final narrow opening geometry while allowing electroplating to occur in the wider space between the mandrel and the opening walls. After electroplating, the mandrel is removed, leaving the desired narrow TSV opening with complete metal fill.
2Reliability
If a wide opening is formed through the substrate, then electroplating is effective with reduced voids, but the opening size is larger than necessary for the final TSV
Solution Approach 1:
The patent performs preliminary actions by first forming the wide opening and then placing the mandrel structure before the electroplating process. This preliminary configuration allows the electroplating to occur in optimal conditions (wider space for metal ion deposition) while the mandrel pre-defines the final narrow opening geometry, ensuring that the metal is deposited only where needed.
Solution Approach 2:
The patent applies local quality by creating different opening widths at different locations and stages: a wide opening is formed initially for effective electroplating, then the mandrel structure creates a narrower local region that defines the final TSV opening. This allows the electroplating process to occur in the wider region while the final structure has the narrower dimensions needed for high-density interconnects.
3Productivity
If the opening is narrowed for high-density interconnects, then the interconnect density is increased, but voids form during electroplating, increasing resistance
Solution Approach 1:
The patent segments the opening formation and electroplating process by introducing a mandrel structure that separates the electroplating space from the final TSV opening space. The electroplating occurs in the wider space between the mandrel and the opening walls, ensuring complete metal deposition, while the mandrel confines the final opening to the narrow dimensions needed for high-density interconnects without void formation.
4Reliability
If etching is extended to reach underlying conductive structures, then the TSV connectivity is improved, but over-etching damages the conductive structures
Solution Approach 1:
The patent uses the mandrel structure as an intermediary that protects the underlying conductive structures during the etching process. The mandrel acts as a physical barrier that prevents the etchant from over-etching into the conductive structures below, while still allowing the etching to proceed sufficiently to establish good TSV connectivity to the conductive layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of TSVs with reduced voids, improving their electrical conductivity while maintaining the reliability of the integrated chip by minimizing over-etching and damage to the conductive structures.
Implementation Method 1
performing a first etching process to form a first opening through the semiconductor substrate
Implementation Method 2
a conductive material is then formed within the opening to define a through-substrate via (TSV)
Data Source
AI summary
In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a conductive structure disposed within a dielectric structure along a first side of a substrate. An insulating structure is disposed along inner sidewalls of the substrate and a blocking layer is disposed along a first inner sidewall and a second inner sidewall of the insulating structure, as viewed in a cross-sectional view. A through-substrate via (TSV) extends vertically through the substrate and along a horizontally-extending surface of the insulating structure. The horizontally-extending surface protrudes outward from the first inner sidewall of the insulating structure and towards the second inner sidewall of the insulating structure.