Wafer-Level TSV Defect Detection via Voltage Comparison
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Solution Overview
Problem
Current methods for testing through-silicon vias (TSVs) in semiconductor integrated circuits are inefficient as they typically require post-packaging testing, which can lead to delayed detection of defects, and there is a need for a method to assess TSV formation at the wafer level before packaging.
Innovation Solution
A test circuit and method that includes a through-silicon via, a voltage driving unit to generate test voltages by charging or discharging the TSV in response to control signals, and a determination unit to compare input and test voltages, allowing for the identification of defective TSVs in both single chips and packaged semiconductor integrated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TSV testing is performed after packaging, then the complete packaged product can be tested, but the testing time is delayed and defect detection is inefficient
Solution Approach 1:
The patent applies preliminary action by performing TSV testing at the wafer level before the packaging process. Test circuits are integrated into the wafer stage, allowing TSV defects to be detected early in the manufacturing flow, before chips are stacked and packaged. This eliminates the time delay associated with post-packaging testing while maintaining comprehensive defect detection capability.
2Productivity
If TSVs are formed in advance in chip fabricating process, then wafer-level testing becomes possible, but additional test circuit complexity is introduced
Solution Approach 1:
The patent merges the TSV structure with the test circuit functionality by integrating test circuits directly into the wafer. The TSVs serve dual purposes: as electrical interconnects for the actual circuit operation and as test structures for wafer-level testing. This integration reduces the need for separate, complex test circuitry while enabling efficient wafer-level testing.
Solution Approach 2:
The TSV structures are designed with multi-functionality, serving both as electrical interconnects for normal circuit operation and as test structures for wafer-level testing. This universal design allows the same physical structures to fulfill multiple roles, reducing overall system complexity while maintaining testing capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate and efficient detection of defective TSVs at the wafer level, improving the reliability of semiconductor integrated circuits by identifying defects before packaging and ensuring proper functionality.
Implementation Method 1
a through-silicon via configured to be charged by receiving an input voltage
Implementation Method 2
a voltage driving unit configured to generate a test voltage by charging or discharging the through-silicon via in response to a test control signal
Data Source
AI summary
A test circuit of a semiconductor integrated circuit includes a through via, a voltage driving unit, and a determination unit. The through via is charged by receiving an input voltage. The voltage driving unit generates a test voltage by charging or discharging the through via in response to a test control signal. The determination unit compares levels of the input voltage and the test voltage and outputs a resultant signal.