TTE Network Scheduling Directional Search Low-Latency Traffic

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Solution Overview

Problem

Current algorithms for scheduling Time-Triggered Ethernet (TTE) networks fail to converge on a valid global schedule for proper traffic throughput due to low-rate, low-latency data sets that violate assumptions about rate and latency requirements, leading to difficulties in selecting valid time slots for Virtual Link (VL) reservations.

Innovation Solution

A directional search method is implemented in the network scheduling and configuration tool (NST) to search for available bin space in either direction within a set of bins, prioritizing the highest rate VLs and using machine learning to adjust the time slot selection algorithm based on demand prediction and bin utilization, ensuring efficient scheduling of VLs across the network.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If current scheduling algorithms are used to sort VLs based on transmit rate and latency constraints, then high-rate VLs can be scheduled efficiently, but low-rate, low-latency VLs cannot be properly scheduled because the algorithm assumes rate and latency requirements track closely and inversely

Engineering Contradiction:
Improvescheduling throughputVSAvoidhandling of low-rate low-latency traffic
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent changes the sorting parameters from rate-based to latency-based ordering. Instead of sorting VLs by transmit rate (highest first), the algorithm now sorts by latency constraints (tightest first). This parameter change allows low-rate, low-latency VLs to be prioritized correctly, resolving the contradiction between maintaining high scheduling throughput and properly handling traffic that violates the inverse rate-latency assumption.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If the scheduling algorithm searches for available bins in a fixed direction, then the search process is simple, but it fails to find valid time slots for VL reservations when bins are occupied in certain patterns

Engineering Contradiction:
Improvesearch simplicityVSAvoidconvergence on valid schedule
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements bidirectional search by allowing the algorithm to search for available bins in both forward and reverse directions through the bin sequence. When a fixed-direction search fails to find valid time slots for VL reservations, the algorithm reverses the search direction. This inversion approach maintains search simplicity while significantly improving reliability by ensuring valid schedules are found even when bins are occupied in patterns that block unidirectional search.

Inventive Principle:
Principle #13The other way round (Inversion)

3Productivity

If machine learning and demand prediction are added to optimize bin selection, then scheduling efficiency for complex traffic patterns improves, but algorithm complexity increases

Engineering Contradiction:
Improvescheduling efficiencyVSAvoidalgorithm complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies machine learning and demand prediction techniques in advance to analyze traffic patterns and predict future bin utilization requirements. By performing this analysis beforehand, the system builds a knowledge base that guides the scheduling algorithm's bin selection process. This preliminary action improves scheduling efficiency for complex traffic patterns while managing algorithm complexity by separating the predictive analysis phase from the real-time scheduling execution phase.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20210067459A1Methods, systems and appratuses for optimizing time-triggered ethernet (TTE) network scheduling by using a directional search for bin selection
Publication Date: 2021.03.04 HONEYWELL INTERNATIONAL INC
  • US20210067459A1 patent drawing
  • US20210067459A1 patent drawing
  • US20210067459A1 patent drawing

AI summary

Methods, systems and apparatuses for scheduling a plurality of Virtual Links (VLs) in a Time-Triggered Ethernet (TTE) network by a network scheduling and configuration tool (NST) by establishing a collection of bins that corresponds to the smallest harmonic period allowing full network traversal of a time-triggered traffic packet in the network for determining available bin sets for sending the VL data by the NST; processing by a scheduling algorithm the VLs to be sent in accordance with a strict order comprising scheduling all the highest rate VLs prior to scheduling lower rate VLs; and scheduling reservations for the VLs in bins by tracking the available time available in each bin and optionally spreading the VL data across available bin sets by sorting a list of available bins by ascending bin utilization and by specifying a left-to-right or right-to-left sort order when searching for available bins based on a position in the timeline between the transmitter and receiver end stations.