Conditional TTL Field Copying in Network Switch Parsers

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Solution Overview

Problem

High-performance network switches face challenges in efficiently processing packets due to limited resources and complexity, which affects their ability to manage packet routing and prevent endless loops, leading to increased hardware complexity and cost.

Innovation Solution

A pipelined architecture that executes conditional move and multiplexing instructions to perform comprehensive copy-TTL operations, reducing hardware complexity while enhancing performance by effectively managing packet routing and hop counts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional packet processing methods are used in network switches, then routing management is achieved, but hardware complexity and cost increase

Engineering Contradiction:
Improvehardware complexityVSAvoidpacket routing management
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent copies the TTL field from the first header field to the destination header field under specific conditions (when the valid bit of the first header field is true and the valid bit of the destination header field is true). This copying mechanism enables efficient packet routing management without requiring complex hardware structures, thereby reducing hardware complexity while maintaining routing reliability.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent changes the state of the destination header field's TTL field parameter by copying it from the first header field based on valid bit conditions. This parameter change approach allows flexible packet processing and routing management using simple conditional logic rather than complex hardware circuits.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If comprehensive packet processing capabilities are implemented, then routing efficiency improves, but hardware resources are consumed

Engineering Contradiction:
Improvepacket processing efficiencyVSAvoidhardware resources
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent extracts only the essential TTL field copying function from complex packet processing operations. By focusing on this specific extraction and implementation, the system achieves efficient packet processing without requiring extensive hardware resources, as only the necessary field copying logic is implemented.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The TTL field copying mechanism serves multiple purposes: it manages packet routing, prevents endless loops, and controls hop counts. This universal approach allows a single simple operation to fulfill multiple packet processing requirements, improving productivity without proportionally increasing hardware resource consumption.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If TTL field copying is performed conditionally, then packet loop prevention improves, but processing complexity increases

Engineering Contradiction:
Improvepacket loop preventionVSAvoidprocessing logic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary checking of valid bits before executing the TTL field copying operation. This preliminary action ensures that copying only occurs when appropriate conditions are met, thereby preventing packet loops while keeping the processing logic simple and straightforward rather than complex.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10033626B2Conditional instructions for packet processing
Publication Date: 2018.07.24 TEXAS INSTRUMENTS INC
  • US10033626B2 patent drawing
  • US10033626B2 patent drawing
  • US10033626B2 patent drawing

AI summary

A network switch includes a plurality of ports, a parser coupled to the plurality of ports, and a processor coupled to the ports and configured to process a received packet via one of the ports. The received packet includes a first header field, a second header field, and a destination header field, each of the first, second, and destination header fields including a TTL field. The parser is configured to decide a valid bit for each of the first header field, the second header field and the destination header field, based on an availability for each of the first header field, the second header field and the destination header field. The processor is configured to execute an instruction to cause content of a select one of the first or second header field's TTL field to be copied to the destination header field.