TTL Input Circuit With Switched Inverter Power to Cut Static Current

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Solution Overview

Problem

Input circuits face challenges in reducing or eliminating static current draw when interfacing with circuits from different voltage domains, particularly when dealing with logic high input signals that are below the supply voltage threshold, leading to noticeable power consumption issues in battery-operated or low-power applications.

Innovation Solution

The implementation of series inverters with a power switch that turns OFF the power supply to the first inverter when the output signal is a logic high and turns it ON when the output signal is a logic low, using a configuration where the second inverter remains continuously powered and the first inverter is selectively powered based on the logic state, thereby minimizing static current draw.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the first inverter is continuously powered to maintain functionality, then the input circuit can respond to logic transitions, but static current draw increases power consumption

Engineering Contradiction:
Improveinput circuit functionalityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The power supply to the first inverter is made dynamic rather than static. A power switch controlled by the second inverter dynamically connects or disconnects the power supply to the first inverter based on the output logic state, allowing the system to adapt power consumption to functional requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The second inverter automatically controls the power switch to manage the first inverter's power supply based on its own output state, creating a self-regulating system that reduces power consumption without external intervention

Inventive Principle:
Principle #25Self-service

2Use of energy by moving object

If the power supply to the first inverter is turned OFF to reduce static current, then power consumption decreases, but the circuit cannot detect falling edges of input signals

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal detection capability
Core Design Contradiction:
Use of energy by moving objectVSEase of operation

Solution Approach 1:

The power switch is pre-configured and controlled by the second inverter's output state, which already contains the information about whether the first inverter needs to be active. This preliminary arrangement allows the first inverter to be powered up exactly when needed without delay

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The output state of the second inverter provides feedback control to the power switch, which in turn controls the power supply to the first inverter. This feedback loop ensures the first inverter is powered only when the system state requires it, maintaining signal detection capability while minimizing power consumption

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12052016B2Recognizing transistor-transistor logic levels (TTL) at an input circuit with increased immunity to static current draw
Publication Date: 2024.07.30 MICROCHIP TECHNOLOGY INC
  • US12052016B2 patent drawing
  • US12052016B2 patent drawing
  • US12052016B2 patent drawing

AI summary

An input circuit that recognizes (e.g., buffers) logic level signals (e.g., of an input signal) represented by voltage levels that are lower than a supply voltage of an input circuit, and that exhibits static current draw immunity during stable states of an input signal. In one or more examples, series inverters are provided to buffer an input node and an output node of the input circuit. A voltage domain at the input circuit or output node may be higher than a voltage domain at the input node. Power supply to a first inverter of the series inverters may be turned OFF at least partially responsive to an indication that an output signal is a logic high; and power supply to the first inverter of the series inverters may be turned ON at least partially responsive to an indication that the output signal is a logic low. A third inverter may be maintained utilizing an input signal voltage to detect a falling edge of the input signal and turn ON power supply to the first inverter at least partially responsive thereto.