Self-aligned Tubular Electrodes for 3D Memory Drain Select Gates
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming self-aligned tubular electrode portions for drain select gate electrodes within memory openings, which affects the performance and density of memory arrays.
Innovation Solution
A method involving the formation of an alternating stack of insulating and spacer material layers over a substrate, followed by the creation of memory openings and tubular electrode portions, where sacrificial matrices are replaced with plate electrode portions to form self-aligned drain select gate electrodes, optimizing the structure for improved alignment and contact efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to form drain select gate electrodes, then the manufacturing process is simpler, but the alignment precision and contact efficiency deteriorate
Solution Approach 1:
The patent applies preliminary action by forming sacrificial matrices at specific positions before creating memory openings. These sacrificial matrices serve as placeholders that guide the subsequent formation of tubular electrode portions, ensuring precise self-alignment without requiring complex alignment processes during later manufacturing steps
Solution Approach 2:
The patent uses sacrificial matrices as intermediary structures that facilitate the formation of properly aligned drain select gate electrodes. These temporary structures mediate between the memory opening formation process and the final electrode alignment, enabling precise positioning that would otherwise require complex direct alignment methods
2Reliability
If conventional electrode formation methods are used, then the manufacturing process is simpler, but the contact resistance increases
Solution Approach 1:
The patent implements self-service through self-aligned formation of tubular electrode portions within memory openings. The electrode portions automatically position themselves relative to the memory stack structures during the filling process, eliminating the need for separate alignment operations and ensuring optimal contact efficiency without increasing manufacturing complexity
Solution Approach 2:
The patent applies the nesting principle by forming tubular electrode portions that are nested within the memory openings and positioned around the memory stack structures. This nested configuration ensures intimate contact between the electrode portions and the plate electrode portions, reducing contact resistance while maintaining a relatively simple manufacturing process
3Manufacturing precision
If alignment tolerance is reduced for better precision, then the manufacturing precision improves, but the device complexity and process difficulty increase
Solution Approach 1:
By pre-forming sacrificial matrices at the correct positions before memory opening creation, the patent establishes the alignment framework in advance. This preliminary action allows subsequent electrode formation to proceed with relaxed alignment tolerances, maintaining high precision without sacrificing manufacturing productivity
Solution Approach 2:
The patent segments the electrode formation process into distinct stages: first forming sacrificial matrices, then creating memory openings, and finally filling with electrode material. This segmentation allows each step to be optimized independently, achieving high alignment precision while maintaining overall process efficiency through modular manufacturing
Data Source
AI summary
Memory opening fill structures extend through an alternating stack of insulating layers and electrically conductive layers and a combination of an insulating fill material layer and plate electrode portions located over the alternating stack. Each memory opening fill structure includes a memory film, a vertical semiconductor channel laterally surrounded by the memory film, and a tubular electrode portion overlying the alternating stack and contacting a respective one of the plate electrode portions. The insulating fill material layer includes a drain select level isolation structure located between neighboring rows of memory opening fill structures. The plate electrode portions and the tubular electrode portions collectively constitute drain select gate electrodes. The tubular electrode portions are incorporated into a respective memory opening fill structure, and the drain select level isolation structure can be self-aligned to the memory opening fill structures.


