Closed-Loop Tunable Delay Circuit for Stable Polar Transmission

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Solution Overview

Problem

Existing signal delay technologies face challenges in maintaining a consistent delay across varying environmental conditions and device processes, leading to instability in phase-modulated signals used in polar transmitters.

Innovation Solution

An adjustable delayer system comprising a series connection of tunable delay circuits and a closed-loop control circuit, which combines first and second delay tuning information to achieve a predetermined delay, compensating for temperature, supply voltage, and process variations, ensuring a well-controlled delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing signal delay technologies are used, then the device complexity is reduced, but the delay stability deteriorates under varying environmental conditions

Engineering Contradiction:
Improvedelay stabilityVSAvoiddelayer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a closed-loop control circuit that continuously monitors the actual delay of the signal and compares it with the desired delay. Based on this feedback, the control circuit dynamically adjusts the delay of tunable delay circuits to compensate for environmental variations such as temperature and supply voltage changes, thereby maintaining stable delay performance

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent employs tunable delay circuits whose delay characteristics can be dynamically adjusted in real-time. This dynamic capability allows the system to adapt to changing environmental conditions by modifying the delay parameters of individual circuits within the series connection, ensuring consistent overall delay performance

Inventive Principle:
Principle #15Dynamics

2Reliability

If tunable delay circuits are used to compensate for environmental variations, then the delay stability improves, but the device complexity increases

Engineering Contradiction:
Improvephase modulation accuracyVSAvoidcontrol circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The closed-loop control circuit measures the actual delay introduced by the series connection of tunable delay circuits and generates control signals to adjust each circuit's delay. This feedback mechanism ensures accurate phase modulation by continuously correcting deviations caused by environmental factors

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent divides the total delay function into multiple segments implemented by series-connected tunable delay circuits. Each circuit can be independently controlled and optimized, allowing the system to achieve the desired total delay while maintaining flexibility for environmental compensation

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9438351B2Adjustable delayer, method for delaying an input signal and polar transmitter
Publication Date: 2016.09.06 APPLE INC
  • US9438351B2 patent drawing
  • US9438351B2 patent drawing
  • US9438351B2 patent drawing

AI summary

An adjustable delayer for adjustably delaying an input signal based on a delay adjustment input information describing a desired delay includes a plurality of series-connected tunable delay circuits, wherein a first of the tunable delay circuits is configured to receive the input signal. The adjustable delayer also includes a closed-loop control circuit configured to provide a first delay tuning information to tune a combined delay of the plurality of tunable delay circuits to fulfill a predetermined condition. The adjustable delayer also includes a combiner to combine the first delay tuning information with a second delay tuning information, that is based on the delay adjustment input information, to obtain a combined delay tuning information. The adjustable delayer is configured to tune a delay of one or more of the tunable delay circuits based on the combined delay tuning information. The adjustable delayer is configured to provide the output signal based on one or more signals present at outputs of one or more of the adjustable delay circuits.