Tunable Current Integrator Peaking for High-Data-Rate Receivers
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Solution Overview
Problem
High data rate receivers face challenges in maintaining optimal signal-to-noise ratio due to increased noise bandwidth and bandwidth variation from process, voltage, and temperature variations, as well as inefficiencies in power and area usage, particularly in implementing decision-feedback equalization functions.
Innovation Solution
The implementation of analog signal current integrators with tunable peaking functions, utilizing adjustable circuit elements such as degeneration capacitors or bias current sources, to dynamically adjust the peaking response based on data rate and channel characteristics, thereby compensating for data rate-dependent losses and stabilizing noise bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If non-integrating DFE summer circuits are used, then implementation simplicity is improved, but power efficiency deteriorates
Solution Approach 1:
The patent replaces traditional non-integrating DFE summer circuits with a sampled current integrator architecture that uses switched-capacitor integration. This substitution achieves both power efficiency through selective sampling and integration operations, and maintains implementation feasibility through standard integrated circuit building blocks.
2Use of energy by moving object
If sampled current integration DFE summer circuits are used, then power efficiency is improved, but noise suppression performance deteriorates
Solution Approach 1:
The patent introduces dynamic peaking control that adjusts the frequency response of the current integrator based on operating conditions. By dynamically tuning the peaking function, the system optimizes noise suppression at critical frequencies while maintaining power efficiency through selective sampling and integration operations.
Solution Approach 2:
The patent changes the frequency response parameters of the current integrator by adjusting peaking control signals. This allows optimization of noise suppression characteristics without changing the fundamental sampled current integration architecture, thereby maintaining power efficiency while improving noise performance.
3Stability of the object's composition
If fixed peaking response is used, then circuit stability is improved, but adaptability to different data rates deteriorates
Solution Approach 1:
The patent implements dynamic peaking control that adjusts the frequency response of the current integrator based on operating conditions. By dynamically tuning the peaking function, the system optimizes noise suppression at critical frequencies while maintaining power efficiency through selective sampling and integration operations.
Solution Approach 2:
The patent changes the frequency response parameters of the current integrator by adjusting peaking control signals. This allows optimization of noise suppression characteristics without changing the fundamental sampled current integration architecture, thereby maintaining power efficiency while improving noise performance.
4Speed
If bandwidth is increased to handle high data rates, then data rate capability is improved, but noise bandwidth variation worsens
Solution Approach 1:
The patent implements dynamic peaking control that adjusts the frequency response of the current integrator based on operating conditions. By dynamically tuning the peaking function, the system optimizes noise suppression at critical frequencies while maintaining power efficiency through selective sampling and integration operations.
Data Source
AI summary
Analog signal current integrators are provided having tunable peaking functions. Analog signal current integrators with tunable peaking functions enable data rate dependent loss compensation for applications in high data rate receiver integrated circuits incorporating advanced equalization functions, such as decision-feedback equalizers. For instance, a current integrator circuit includes a current integrating amplifier circuit comprising an adjustable circuit element to tune a peaking response of the current integrator circuit, and a peaking control circuit to generate a control signal to adjust a value of the adjustable circuit element as a function of an operating condition of the current integrator circuit. The operating condition may be a specified data rate or a communication channel characteristic or both. The adjustable circuit element may be a degeneration capacitor or a bias current source.


